74LVC4245AD NXP Semiconductors, 74LVC4245AD Datasheet - Page 3

• Manufacturer Part Number: 74LVC4245AD
• Description: Bus Transceivers XCVR 8BIT LVL SHIFTR
• Manufacturer: NXP Semiconductors

Specifications of 74LVC4245AD

• Product Category: Bus Transceivers
• Rohs: yes
• Logic Type: CMOS
• Logic Family: 74LVC
• Number Of Channels Per Chip: 8
• Input Level: LVTTL
• Output Level: LVTTL
• Output Type: 3-State
• High Level Output Current: - 24 mA
• Low Level Output Current: 24 mA
• Propagation Delay Time: 10 ns
• Supply Voltage - Max: 3.6 V, 5.5 V
• Supply Voltage - Min: 1.5 V
• Maximum Operating Temperature: + 125 C
• Package / Case: SO-24
• Function: Bus Transceiver with Voltage Translation
• Maximum Power Dissipation: 500 mW
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Circuits: 1
• Polarity: Non-Inverting
• Factory Pack Quantity: 30
• Part # Aliases: 74LVC4245AD,112

NXP Semiconductors
5. Pinning information
Table 2.
74LVC4245A
Product data sheet
Symbol
V
V
GND
DIR
A[0:7]
B[0:7]
OE
Fig 3.
CC(A)
CC(B)
Pin configuration SO24 and (T)SSOP24
Pin description
V
CC(A)
GND
GND
DIR
A0
A1
A2
A3
A4
A5
A6
A7
5.1 Pinning
5.2 Pin description
10
11
12
1
2
3
4
5
6
7
8
9
74LVC4245A
001aaa349
24
23
22
21
20
19
18
17
16
15
14
13
Pin
1
23, 24
11, 12, 13
2
3, 4, 5, 6, 7, 8, 9, 10
21, 20, 19, 18, 17, 16, 15, 14
22
All information provided in this document is subject to legal disclaimers.
V
V
OE
B0
B1
B2
B3
B4
B5
B6
B7
GND
CC(B)
CC(B)
Rev. 10 — 18 December 2012
Fig 4.
Octal dual supply translating transceiver; 3-state
(1) This is not a supply pin. The substrate is attached to this
index area
terminal 1
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Pin configuration DHVQFN24
GND
DIR
A0
A1
A2
A3
A4
A5
A6
A7
10
11
Description
supply voltage (5 V bus)
supply voltage (3 V bus)
ground (0 V)
direction control
data input or output
data input or output
output enable input (active LOW)
2
3
4
5
6
7
8
9
Transparent top view
74LVC4245A
GND
74LVC4245A
(1)
© NXP B.V. 2012. All rights reserved.
23
22
21
20
19
18
17
16
15
14
001aah087
V
OE
B0
B1
B2
B3
B4
B5
B6
B7
CC(B)
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