515CAA25M0000AAG Silicon Labs, 515CAA25M0000AAG Datasheet
515CAA25M0000AAG
Specifications of 515CAA25M0000AAG
Related parts for 515CAA25M0000AAG
515CAA25M0000AAG Summary of contents
Page 1
... MHz. Unlike a traditional VCXO where a different crystal is required for each output frequency, the Si515 uses one fixed crystal and Silicon Labs’ proprietary synthesizer to generate any frequency across this range. This IC-based approach allows the crystal resonator to provide enhanced reliability, improved mechanical robustness, and excellent stability ...
Page 2
Si 515 2 Rev. 1.0 ...
Page 3
T C ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 4
Si 515 1. Electrical Specifications Table 1. Recommended Operating Conditions V = 2.5 or 3.3 V ±10 – Parameter Symbol Supply Voltage V Supply Current “1” Setting V OE “0” Setting ...
Page 5
Table 2. Vc Control Voltage Input V = 2.5 or 3.3 V ±10 – Parameter Control Voltage Range Control Voltage Tuning Slope ( Variation Control Voltage Linearity Modulation ...
Page 6
Si 515 Table 4. Output Clock Levels and Symmetry V = 2.5 or 3.3 V ±10 – Parameter Symbol CMOS Output Logic High V CMOS Output Logic Low V CMOS Output Logic High I ...
Page 7
Table 5. Output Clock Jitter and Phase Noise (LVPECL 2.5 or 3.3 V ±10 – Parameter Symbol Period Jitter (RMS) J PRMS Period Jitter (PK-PK) J PPKPK Phase Jitter (RMS) φJ Phase ...
Page 8
Si 515 Table 6. Output Clock Jitter and Phase Noise (LVDS 1.8 V ±5%, 2.5 or 3.3 V ±10 Symbol Parameter Period Jitter JPRMS (RMS) Period Jitter JPPKPK (Pk-Pk) Phase Jitter φJ 1.875 MHz to ...
Page 9
Table 7. Output Clock Jitter and Phase Noise (HCSL 1.8 V ±5%, 2.5 or 3.3 V ±10 Symbol Parameter Period Jitter JPRMS (RMS) Period Jitter JPPKPK (Pk-Pk) Phase Jitter φJ 1.875 MHz to 20 MHz ...
Page 10
Si 515 Table 8. Output Clock Jitter and Phase Noise (CMOS, Dual CMOS 1.8 V ±5%, 2.5 or 3.3 V ±10 Symbol Parameter Phase Jitter φJ 1.875 MHz to 20 MHz integration (RMS) Phase Noise, ...
Page 11
Table 10. Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Table 11. Absolute Maximum Ratings Parameter Maximum Operating Temperature Storage Temperature Supply Voltage Input Voltage (any input pin) ESD Sensitivity (HBM, per JESD22-A114) Soldering Temperature (Pb-free profile) Soldering Temperature Time ...
Page 12
Si 515 2. Pin Descriptions GND CMOS VCXO Table 12. Si515 Pin Descriptions (CMOS) Pin Name GND 4 CLK Table 13. Si515 Pin Descriptions ...
Page 13
Dual CMOS Buffer Dual CMOS output format ordering options support either complementary or in-phase output signals. This feature enables replacement of multiple VCXOs with a single Si515 device Figure 1. Integrated 1:2 CMOS Buffer Supports Complementary or ...
Page 14
... The Si515 supports a variety of options including frequency, stability, tuning slope, output format, and V device configurations are programmed into the Si515 at time of shipment. Configurations are specified using the Part Number Configuration chart shown below. Silicon Labs provides a web browser-based part number configuration utility to simplify this process. Refer to Si515 VCXO series is supplied in industry-standard, RoHS compliant, lead-free, 3 ...
Page 15
Package Outline Diagram mm, 6-pin Figure 3 illustrates the package details for the Si515. Table 14 lists the values for the dimensions shown in the illustration. Table 14. Package Diagram Dimensions (mm) Dimension A b ...
Page 16
Si 515 5. PCB Land Pattern mm, 6-pin Figure 4 illustrates the PCB land pattern for the Si515. Table 15 lists the values for the dimensions shown in the illustration. Table 15. PCB ...
Page 17
Package Outline Diagram: 3.2 x 5.0 mm, 6-pin Figure 5 illustrates the package details for the 3 Si510/511. Table 16 lists the values for the dimensions shown in the illustration. Table 16. Package Diagram Dimensions ...
Page 18
Si 515 7. PCB Land Pattern: 3.2 x 5.0 mm, 6-pin Figure 6 illustrates the recommended 3 PCB land pattern for the Si515. Table 17 lists the values for the dimensions shown in the illustration. Table ...
Page 19
Top Marking Use the part number configuration utility located at: mark code to a specific device configuration. 8.1. Si515 Top Marking 8.2. Top Marking Explanation Mark Method: Line 1 Marking: Line 2 Marking: Line 3 Marking: www.silabs.com/VCXOPartNumber 5 C ...
Page 20
Si 515 OCUMENT HANGE IST Revision 0.9 to Revision 1.0 Updated Table 1 on page 4. Updates to supply current typical and maximum values for CMOS, LVDS, LVPECL and HCSL. CMOS frequency test condition corrected ...
Page 21
N : OTES Rev. 1.0 Si515 21 ...
Page 22
... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...