CAT64LC40WI-GT3 ON Semiconductor, CAT64LC40WI-GT3 Datasheet - Page 5
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CAT64LC40WI-GT3
Manufacturer Part Number
CAT64LC40WI-GT3
Description
EEPROM
Manufacturer
ON Semiconductor
Datasheet
1.CAT64LC40WI-GT3.pdf
(12 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT64LC40WI-GT3
Manufacturer:
ON/安森美
Quantity:
20 000
Device Operation
for use with all standard controllers. The CAT64LC40 is
organized in a 256 x 16 format. All instructions are based on
an 8−bit format. There are four 16−bit instructions: READ,
WRITE, EWEN, and EWDS. The CAT64LC40 operates on
a single power supply ranging from 2.5 V to 6.0 V and it has
an on−chip voltage generator to provide the high voltage
needed during a programming operation. Instructions,
addresses and data to be written are clocked into the DI pin
RDY/BUSY
RDY/BUSY
*Please check the instruction set table for address
The CAT64LC40 is a 4 kb nonvolatile memory intended
RESET
RESET
CS
DO
SK
CS
DO
DI
SK
DI
1
t
t
RC
RESS
0
1
t
CSS
t
HIGH
DIS
0
t
RESH
1
0
t
DIH
Figure 3. Synchronous Data Timing
Figure 4. Read Instruction Timing
0
0
http://onsemi.com
5
t
t
PD0
SKLOW
ADDRESS*
on the rising edge of the SK clock. The DO pin is normally
in a high impedance state except when outputting data in a
READ operation or outputting RDY/BSY status when
polled during a WRITE operation.
a 4−bit start sequence, 1010, a 4−bit op code and an 8−bit
address field or dummy bits. For a WRITE operation, a
16−bit data field is also required following the 8−bit address
field.
, t
The format for all instructions sent to this device includes
PD1
t
CSH
t
HZ
t
SKHI
D15 D14
t
CSMIN
t
SV
D1 D0
t
SV