DS28E05R+T Maxim Integrated, DS28E05R+T Datasheet - Page 13

• Manufacturer Part Number: DS28E05R+T
• Description: EEPROM 1-Wire 112-BYTE EEPROM
• Manufacturer: Maxim Integrated

Specifications of DS28E05R+T

• Rohs: yes

DS28E05
Resume Command [A5h]
To maximize the data throughput in a multidrop environ-
ment, the Resume command is available. This command
checks the status of the RC bit and, if it is set, directly
transfers control to the memory functions, similar to a
Skip ROM command. The only way to set the RC bit is
through successfully executing the Match ROM or Search
ROM command. Once the RC bit is set, the device can
repeatedly be accessed through the Resume command.
Accessing another device on the bus clears the RC bit,
preventing two or more devices from simultaneously
responding to the Resume command.
1-Wire Signaling
The DS28E05 requires strict protocols to ensure data
integrity. The protocol consists of four types of signaling
on one line: reset sequence with reset pulse and presence
pulse, write-zero, write-one, and read-data. Except for the
presence pulse, the bus master initiates all falling edges.
The DS28E05 communicates at overdrive speed only.
To get from idle to active, the voltage on the 1-Wire line
needs to fall from V
from active to idle, the voltage needs to rise from V
past the threshold V
to make this rise is seen in Figure 9 as ε, and its duration
depends on the pullup resistor (R
capacitance of the 1-Wire network attached. The voltage
V
logical level, not triggering any events.
Figure 9
begin any communication with the DS28E05. A reset
pulse followed by a presence pulse indicates that the
DS28E05 is ready to receive data, given the correct ROM
Figure 9. Initialization Procedure: Reset and Presence Pulse
www.maximintegrated.com
IL(MAX)
is relevant for the DS28E05 when determining a
shows the initialization sequence required to
V
IHMASTER
V
IL(MAX)
V
PUP
V
V
0V
TH
TL
PUP
TH
. The time it takes for the voltage
below the threshold V
t
F
MASTER Tx "RESET PULSE"
RESISTOR
PUP
) used and the
t
RSTL
TL
. To get
IL(MAX)
ε
and memory function command. If the bus master uses
slew-rate control on the falling edge, it must pull down the
line for t
After the bus master has released the line it goes into
receive mode. Now the 1-Wire bus is pulled to V
the pullup resistor. When the threshold V
DS28E05 waits and then transmits a presence pulse by
pulling the line low. To detect a presence pulse, the master
must test the logical state of the 1-Wire line at t
Read-/Write-Time Slots
Data communication with the DS28E05 takes place in
time slots that carry a single bit each. Write time slots
transport data from bus master to slave. Read time slots
transfer data from slave to master.
the definitions of the write- and read-time slots.
All communication begins with the master pulling the data
line low. As the voltage on the 1-Wire line falls below
the threshold V
generator that determines when the data line is sampled
during a write time slot and how long data is valid during
a read time slot.
Master-to-Slave
For a write-one time slot, the voltage on the data line
must have crossed the V
one low time t
slot, the voltage on the data line must stay below the
V
expired. For the most reliable communication, the voltage
on the data line should not exceed V
entire t
been crossed, the DS28E05 needs a recovery time t
before it is ready for the next time slot.
MASTER
TH
threshold until the write-zero low time t
t
W0L
MSP
RSTL
MASTER Rx "PRESENCE PULSE"
or t
+ t
W1L(MAX)
t
RSTH
TL
W1L
F
, the DS28E05 starts its internal timing
to compensate for the edge.
window. After the V
is expired. For a write-zero time
t
TH
REC
DS28E05
threshold before the write-
1-Wire EEPROM
Figure 10
Maxim Integrated │ 13
IL(MAX)
TH
TH
is crossed, the
threshold has
MSP
PUP
W0L(MIN)
during the
illustrates
.
through
REC
is