M95040-RMC6TG STMicroelectronics, M95040-RMC6TG Datasheet - Page 13

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M95040-RMC6TG

Manufacturer Part Number
M95040-RMC6TG
Description
EEPROM 4 Kbit SPI BUS EE 10MHz CR 5ms
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95040-RMC6TG

Product Category
EEPROM
Rohs
yes
M950x0 M950x0-W M950x0-R
4
4.1
4.2
Operating features
Hold condition
The Hold (HOLD) signal is used to pause any serial communications with the device without
resetting the clocking sequence.
During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data
Input (D) and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be selected, with Chip Select (S) low.
Normally, the device is kept selected, for the whole duration of the Hold condition.
Deselecting the device while it is in the Hold condition has the effect of resetting the state of
the device, and this mechanism can be used if it is required to reset any processes that had
been in progress.
The Hold condition starts when the Hold (HOLD) signal is driven low at the same time as
Serial Clock (C) already being low (as shown in
The Hold condition ends when the Hold (HOLD) signal is driven high at the same time as
Serial Clock (C) already being low.
Figure 5: Hold condition activation
are not timed to coincide with Serial Clock (C) being low.
Figure 5.
Status register
Figure 6: Block diagram
device. This register contains a number of control bits and status bits, as shown in
Status register
Read Status Register
HOLD
C
Hold condition activation
format. For a detailed description of the Status register bits, see
(RDSR).
shows the position of the Status register in the control logic of the
Doc ID 6512 Rev 10
Condition
Hold
also shows what happens if the rising and falling edges
Figure 5: Hold condition
Condition
Hold
Operating features
activation).
Section 6.3:
Table 5:
AI02029D
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