M95040-RMC6TG STMicroelectronics, M95040-RMC6TG Datasheet - Page 16

no-image

M95040-RMC6TG

Manufacturer Part Number
M95040-RMC6TG
Description
EEPROM 4 Kbit SPI BUS EE 10MHz CR 5ms
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95040-RMC6TG

Product Category
EEPROM
Rohs
yes
Instructions
6
6.1
16/44
Instructions
Each instruction starts with a single-byte code, as summarized in
If an invalid instruction is sent (one not contained in
automatically deselects itself.
Table 4.
1. X = Don’t Care.
2. A8 = 1 for the upper half of the memory array of the M95040, and 0 for the lower half, and is Don’t Care for
Write Enable (WREN)
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction.
The only way to do this is to send a Write Enable instruction to the device.
As shown in
device, Chip Select (S) is driven low, and the bits of the instruction byte are shifted in, on
Serial Data Input (D). The device then enters a wait state. It waits for a the device to be
deselected, by Chip Select (S) being driven high.
Figure 7.
WREN
WRDI
RDSR
WRSR
READ
WRITE
other devices.
Instruction
Instruction set
Figure 7: Write Enable (WREN)
Write Enable (WREN) sequence
S
C
D
Q
Write Enable
Write Disable
Read Status Register
Write Status Register
Read from Memory Array
Write to Memory Array
Doc ID 6512 Rev 10
Description
High Impedance
0
1
2
Instruction
sequence, to send this instruction to the
3
4
5
Table 4: Instruction
6
7
M950x0 M950x0-W M950x0-R
AI01441D
Table 4: Instruction
Instruction Format
0000 A
0000 A
0000 X110
0000 X100
0000 X101
0000 X001
set), the device
8
8
011
010
(1)
(1)
(1)
(1)
(2)
(2)
set.

Related parts for M95040-RMC6TG