M24256-BFMC6TG STMicroelectronics, M24256-BFMC6TG Datasheet - Page 19
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M24256-BFMC6TG
Manufacturer Part Number
M24256-BFMC6TG
Description
EEPROM 256kB Serial I2C 3-Chip Enable 1 MHz
Manufacturer
STMicroelectronics
Datasheet
1.M24256-DRMN6TP.pdf
(40 pages)
Specifications of M24256-BFMC6TG
Product Category
EEPROM
Rohs
yes
Available stocks
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Part Number
Manufacturer
Quantity
Price
M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF
5.2
Read operations
Read operations are performed independently of the state of the Write Control (WC) signal.
After the successful completion of a Read operation, the device internal address counter is
incremented by one, to point to the next byte address.
For the Read instructions, after each byte read (data out), the device waits for an
acknowledgment (data in) during the 9th bit time. If the bus master does not acknowledge
during this 9th time, the device terminates the data transfer and switches to its Standby
mode.
Figure 10. Read mode sequences
Current
Address
Read
Random
Address
Read
Sequential
Current
Read
Sequention
Random
Read
Dev sel *
Dev sel *
ACK
Dev sel
Dev sel
Data out N
R/W
R/W
R/W
Doc ID 6757 Rev 30
ACK
ACK
ACK
ACK
R/W
NO ACK
Data out 1
Byte addr
Byte addr
Data out
NO ACK
ACK
ACK
ACK
Byte addr
Byte addr
ACK
ACK
ACK
Data out N
Dev sel *
Dev sel *
NO ACK
R/W
ACK
ACK
R/W
Data out1
Data out
Instructions
NO ACK
AI01105d
ACK
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