M95080-RMC6TG STMicroelectronics, M95080-RMC6TG Datasheet - Page 25
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M95080-RMC6TG
Manufacturer Part Number
M95080-RMC6TG
Description
EEPROM 8 Kbit SPI BUS EE 10MHz CR 5ms
Manufacturer
STMicroelectronics
Datasheet
1.M95080-WMB6TG.pdf
(42 pages)
Specifications of M95080-RMC6TG
Product Category
EEPROM
Rohs
yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
M95080 M95080-W M95080-R
7
7.1
7.2
Power-up and delivery state
Power-up state
After power-up, the device is in the following state:
●
●
●
●
●
The SRWD, BP1 and BP0 bits of the Status Register are unchanged from the previous
power-down (they are non-volatile bits).
Initial delivery state
The device is delivered with the memory array set to all 1s (each byte = FFh). The Status
Register Write Disable (SRWD) and Block Protect (BP1 and BP0) bits are initialized to 0.
Standby power mode,
deselected (after power-up, a falling edge is required on Chip Select (S) before any
instructions can be started),
not in the Hold condition,
the Write Enable Latch (WEL) is reset to 0,
Write In Progress (WIP) is reset to 0.
Doc ID 022540 Rev 1
Power-up and delivery state
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