M24C32-DFMC6TG STMicroelectronics, M24C32-DFMC6TG Datasheet - Page 15
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M24C32-DFMC6TG
Manufacturer Part Number
M24C32-DFMC6TG
Description
EEPROM 32 Kbit I2C EEProm 4kB 2.5V to 5.5V
Manufacturer
STMicroelectronics
Datasheet
1.M24C32-FDW6TP.pdf
(40 pages)
Specifications of M24C32-DFMC6TG
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M24C32-W M24C32-R M24C32-F M24C32-X M24C32-DF
5.1.1
Byte Write
After the device select code and the address bytes, the bus master sends one data byte. If
the addressed location is Write-protected, by Write Control (WC) being driven high, the
device replies with NoAck, and the location is not modified. If, instead, the addressed
location is not Write-protected, the device replies with Ack. The bus master terminates the
transfer by generating a Stop condition, as shown in
Figure 6.
WC
Byte Write
WC
Page Write
WC (cont'd)
Page Write (cont'd)
Write mode sequences with WC = 0 (data write enabled)
ACK
Dev sel
Dev sel
Doc ID 4578 Rev 21
Data in N
R/W
R/W
ACK
ACK
ACK
Byte addr
Byte addr
ACK
ACK
Figure
Byte addr
Byte addr
6.
ACK
ACK
Data in 1
Data in
ACK
ACK
Instructions
AI01106d
Data in 2
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