LCMXO2-256HC-4SG32I Lattice, LCMXO2-256HC-4SG32I Datasheet - Page 49

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LCMXO2-256HC-4SG32I

Manufacturer Part Number
LCMXO2-256HC-4SG32I
Description
FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 3.3V -6 Speed
Manufacturer
Lattice
Datasheet

Specifications of LCMXO2-256HC-4SG32I

Rohs
yes
Number Of I/os
22
Maximum Operating Frequency
400 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Mounting Style
SMD/SMT
Package / Case
QFN-32
Distributed Ram
2 KB
Operating Supply Current
18 uA
Factory Pack Quantity
490

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LCMXO2-256HC-4SG32I
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LCMXO2-256HC-4SG32I
Quantity:
22
LVDS Emulation
MachXO2 devices can support LVDS outputs via emulation (LVDS25E). The output is emulated using complemen-
tary LVCMOS outputs in conjunction with resistors across the driver outputs on all devices. The scheme shown in
Figure 3-1 is one possible solution for LVDS standard implementation. Resistor values in Figure 3-1 are industry
standard values for 1% resistors.
Figure 3-1. LVDS Using External Resistors (LVDS25E)
Table 3-1. LVDS25E DC Conditions
Z
R
R
R
V
V
V
V
Z
I
DC
OUT
OH
OL
OD
BACK
S
P
T
CM
Parameter
8mA
8mA
Note: All resistors are ±1%.
VCCIO = 2.5
VCCIO = 2.5
Emulated
On-chip
Buffer
LVDS
Output impedance
Driver series resistor
Driver parallel resistor
Receiver termination
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
Back impedance
DC output current
Over Recommended Operating Conditions
Off-chip
Description
158
158
140
3-10
Zo = 100
100.5
DC and Switching Characteristics
Typ.
1.43
1.07
0.35
1.25
6.03
158
140
100
20
Off-chip
MachXO2 Family Data Sheet
100
Ohms
Ohms
Ohms
Ohms
Ohms
Units
mA
V
V
V
V
On-chip
+
-

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