LCMXO2-1200ZE-1UWG25ITR50 Lattice, LCMXO2-1200ZE-1UWG25ITR50 Datasheet - Page 46

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LCMXO2-1200ZE-1UWG25ITR50

Manufacturer Part Number
LCMXO2-1200ZE-1UWG25ITR50
Description
FPGA - Field Programmable Gate Array 19 LUTs 19 IO 1.2V 1 Spd
Manufacturer
Lattice
Datasheet

Specifications of LCMXO2-1200ZE-1UWG25ITR50

Rohs
yes
Number Of Gates
1200
Embedded Block Ram - Ebr
64 Kbit
Number Of I/os
19
Maximum Operating Frequency
400 MHz
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 100 C
Mounting Style
SMD/SMT
Package / Case
WLCPS-25
Distributed Ram
10 Kbit
Operating Supply Current
56 uA
sysIO Recommended Operating Conditions
LVCMOS 3.3
LVCMOS 2.5
LVCMOS 1.8
LVCMOS 1.5
LVCMOS 1.2
LVTTL
PCI
SSTL25
SSTL18
HSTL18
LVDS25
LVDS33
LVPECL
BLVDS
RSDS
SSTL18D
SSTL25D
HSTL18D
1. Inputs on-chip. Outputs are implemented with the addition of external resistors.
2. MachXO2-640U, MachXO2-1200/U and larger devices have dedicated LVDS buffers
3. Input on the bottom bank of the MachXO2-640U, MachXO2-1200/U and larger devices only.
Standard
3
1
1
1, 2
1, 2
1
3.135
2.375
1.425
3.135
3.135
2.375
2.375
3.135
3.135
2.375
2.375
2.375
Min.
1.71
1.14
1.71
1.71
1.71
1.71
V
CCIO
Typ.
3.3
2.5
1.8
1.5
1.2
3.3
3.3
2.5
1.8
1.8
2.5
3.3
3.3
2.5
2.5
1.8
2.5
1.8
(V)
3.465
2.625
1.575
3.465
3.465
2.625
2.625
3.465
3.465
2.625
2.625
2.625
Max.
1.89
1.26
1.89
1.89
1.89
1.89
3-7
DC and Switching Characteristics
0.833
0.816
Min.
1.15
MachXO2 Family Data Sheet
V
REF
Typ.
1.25
0.9
0.9
(V)
0.969
Max.
1.35
1.08

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