KSZ8841-16MVLI TR Micrel, KSZ8841-16MVLI TR Datasheet - Page 77

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KSZ8841-16MVLI TR

Manufacturer Part Number
KSZ8841-16MVLI TR
Description
Ethernet ICs Single Ethernet Port + Generic (8, 16-bit) bus interface(Lead Free)
Manufacturer
Micrel
Datasheet

Specifications of KSZ8841-16MVLI TR

Rohs
yes
Product
Ethernet Controllers
Package / Case
LQFP-128
Mounting Style
SMD/SMT
Bank 45 PHY 1 MII-Register Basic Status Register (0x02): P1MBSR
This register contains the MII register status for the chip function.
Bank 45 PHY 1 PHYID Low Register (0x04): PHY1ILR
This register contains the PHY ID (low) for the chip.
October 2007
Micrel, Inc.
Bit
15
14
13
12
11
10-7
6
5
4
3
2
1
0
Bit
15-0
Default
0
1
1
1
1
0
0
0
0
1
0
0
0
Default
0x1430
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
RO
Description
T4 Capable
1 = 100 BASE-T4 capable.
0 = not 100 BASE-T4 capable.
100 Full Capable
1 = 100BASE-TX full-duplex capable.
0 = not 100BASE-TX full duplex.capable.
100 Half Capable
1= 100BASE-TX half-duplex capable.
0= not 100BASE-TX half-duplex capable.
10 Full Capable
1 = 10BASE-T full-duplex capable.
0 = not 10BASE-T full-duplex capable.
10 Half Capable
1 = 10BASE-T half-duplex capable.
0 = not 10BASE-T half-duplex capable.
Reserved.
Preamble suppressed
Not supported.
AN Complete
1 = auto-negotiation complete.
0 = auto-negotiation not completed.
Reserved
AN Capable
1 = auto-negotiation capable.
0 = not auto-negotiation capable.
Link Status
1 = link is up.
0 = link is down.
Jabber test
Not supported.
Extended Capable
1 = extended register capable.
0 = not extended register capable.
Description
PHYID Low
Low order PHYID bits.
77
Bit is same as:
Bank49 0x4 bit6
Bank49 0x4 bit8
Bank49 0x4 bit5
KSZ8841-16/32 MQL/MVL/MBL
M9999-102207-1.6

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