78Q2123/F1 Maxim Integrated, 78Q2123/F1 Datasheet - Page 17

• Manufacturer Part Number: 78Q2123/F1
• Description: Ethernet ICs
• Manufacturer: Maxim Integrated

Specifications of 78Q2123/F1

• Rohs: yes

DS_21x3_001
3.3
3.4
3.5
Rev. 1.6
2.15:0 OUI [23:6]
3.15:10 OUI [5:0]
4.15
4.14
4.13
4.12
4.11
4.10
3.9:4
3.3:0
1.0
Bit
Bit
4.9
4.8
4.7
4.6
Bit
MR2: PHY Identifier Register 1
MR3: PHY Identifier Register 2
MR4: Auto-Negotiation Advertisement Register
Symbol
Symbol
RSVD
Symbol
EXTD
NP
RF
A7
A6
A5
A4
A3
A2
A1
MN
RN
Type
R/W
R/W
R/W
R/W
R/W
Type
Type
R
R
R
R
R
R
R
R
R
R
Default
000Eh
Value
Value
1Ch
23h
07h
(1)
(1)
(1)
0
0
0
0
0
0
0
1
Description
Organizationally Unique Identifier: This value is 00-C0-39 for
Teridian Semiconductor Corporation. This register contains the
first 16-bits of the identifier.
Description
Organizationally Unique Identifier: Remaining 6 bits of the
OUI.
Model Number: The last 2 digits of the model number
78Q2123 are encoded into the 6 bits for both 78Q2123 and
78Q2133.
Revision Number: The value ‘0111’ corresponds to the
seventh revision of the silicon.
Description
Next Page: Not supported. Reads logic zero.
Reserved
Remote Fault: Setting this bit to ‘1’ allows the device to
indicate to the link partner a Remote Fault Condition.
Reserved.
Asymmetric PAUSE Support Indication for Full Duplex Links.
Default is 0 indicating not supported. If the MAC supports
Asymmetric PAUSE, this bit can be written as 1. Writing to this
register has no effect until auto-negotiation is re-initiated.
PAUSE Support Indication for Full Duplex Links. Default is 0
indicating not supported. If the MAC supports PAUSE, this bit
can be written as 1. Writing to this register has no effect until
auto-negotiation is re-initiated
100BASE-T4: The 78Q2123/78Q2133 do not support
100BASE-T4 operation.
100BASE-TX Full Duplex: If the MR1.14 bit is ‘1’, this bit will
be set to ‘1’ upon reset and will be writeable. Otherwise, this
bit cannot be set to ‘1’ by the management.
100BASE-TX: If the MR1.13 bit is ‘1’, this bit will be set to ‘1’
upon reset and will be writeable. Otherwise, this bit cannot be
set to ‘1’ by the management.
10BASE-T Full Duplex: If the MR1.12 bit is ‘1’, this bit will be
set to ‘1’ upon reset and will be writeable. Otherwise, this bit
cannot be set to ‘1’ by the management.
cleared by a read operation.
Extended Capability: Reads ’1’ to indicate the
78Q2123/78Q2133 provide an extended register set (MR2
and beyond).
78Q2123/78Q2133 Data Sheet
17