73S8010C-IMR/F1 Maxim Integrated, 73S8010C-IMR/F1 Datasheet - Page 9

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73S8010C-IMR/F1

Manufacturer Part Number
73S8010C-IMR/F1
Description
I2C Interface IC
Manufacturer
Maxim Integrated
Datasheet

Specifications of 73S8010C-IMR/F1

Rohs
yes
2.3 I
Rev. 1.5
Symbol
Fsclk
Tlow
Thi
Thdsta
Tsudat
Thddat
Tsusto
Tbuf
SDA
SCL
2
C-bus Timing
Parameter
Clock frequency
Clock low
Clock high
Hold time START condition
Data set up time
Data hold time
Set up time STOP condition
Bus free time between a STOP and
START condition
Thdsta
Tsudat
Figure 4: I
Figure 3: I
2
Thi
C Bus Timing Diagram
2
C Bus Read Protocol
Thddat
Conditions
Tlow
Tsusto
Min.
100
0.6
1.3
0.6
0.6
1.3
5
Tbuf
Typ.
Max.
400
900
UNIT
kHz
s
s
s
ns
ns
s
s
9

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