89HPES8T5ZHBCG IDT, 89HPES8T5ZHBCG Datasheet - Page 2

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89HPES8T5ZHBCG

Manufacturer Part Number
89HPES8T5ZHBCG
Description
Interface - I/O Expanders
Manufacturer
IDT
Datasheet

Specifications of 89HPES8T5ZHBCG

Product Category
Interface - I/O Expanders
Rohs
yes
Part # Aliases
IDT89HPES8T5ZHBCG
Product Description
throughput, low latency, and simple board layout with a minimum number of board layers. It provides connectivity for up to 5 ports across 8 integrated
serial lanes. Each lane provides 2.5 Gbps of bandwidth in both directions and is fully compliant with PCI Express Base specification revision 1.1.
tion layers. The PES8T5 can operate either as a store and forward switch or a cut-through switch and is designed to switch memory and I/O transac-
tions. It supports eight Traffic Classes (TCs) and one Virtual Channel (VC) with sophisticated resource management to allow efficient switching for
applications requiring additional narrow port connectivity.
IDT 89HPES8T5 Data Sheet
Utilizing standard PCI Express interconnect, the PES8T5 provides the most efficient I/O connectivity solution for applications requiring high
The PES8T5 is based on a flexible and efficient layered architecture. The PCI Express layer consists of SerDes, Physical, Data Link and Transac-
Testability and Debug Features
– Ability to read and write any internal register via the SMBus
Eleven General Purpose Input/Output pins
– Each pin may be individually configured as an input or output
– Each pin may be individually configured as an interrupt input
– Some pins have selectable alternate functions
Packaged in 19mm x 19mm 324-ball BGA with 1mm ball spacing
Figure 2 I/O Expansion Application
x1
LOM
GE
Processor
x1
LOM
GE
2 of 31
Bridge
PES8T5
North
Bridge
South
Processor
x1
x4
GE
x1
Memory
1394
Memory
Memory
Memory
March 27, 2008

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