C8051F540-IMR Silicon Labs, C8051F540-IMR Datasheet - Page 94
![no-image](/images/no-image-200.jpg)
C8051F540-IMR
Manufacturer Part Number
C8051F540-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 16 kB 1 kB LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet
1.C8051F546-IMR.pdf
(274 pages)
Specifications of C8051F540-IMR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
- Current page: 94 of 274
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C8051F54x
On the execution of the RETI instruction in the SPI0 ISR, the value in SFRPAGE register is overwritten
with the contents of SFRNEXT. The CIP-51 may now access the SMB0ADR register as it did prior to the
interrupts occurring. See Figure 12.6.
94
SFRPAGE
SFRNEXT
SFRNEXT
SFRLAST
popped to
popped to
Figure 12.5. SFR Page Stack Upon Return From PCA Interrupt
(SMB0ADR)
stack on return from
popped off of the
SFR Page 0x00
(SPI0)
Automatically
0x0F
0x00
interrupt
Rev. 1.1
SFRPAGE
SFRNEXT
SFRLAST
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