C8051F714-GMR Silicon Labs, C8051F714-GMR Datasheet - Page 149
![no-image](/images/no-image-200.jpg)
C8051F714-GMR
Manufacturer Part Number
C8051F714-GMR
Description
8-bit Microcontrollers - MCU 8kB ADC Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F714-GMR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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6. Using the MOVX instruction, write a data byte to any location within the 512-byte page to be erased.
7. Clear the PSWE and PSEE bits.
8. Restore previous interrupt state.
Steps 4–6 must be repeated for each 512-byte page to be erased.
Note: Flash security settings may prevent erasure of some Flash pages, such as the reserved area and the page
22.1.3. Flash Write Procedure
A write to Flash memory can clear bits to logic 0 but cannot set them; only an erase operation can set bits
to logic 1 in Flash. A byte location to be programmed should be erased before a new value is written.
The recommended procedure for writing a single byte in Flash is as follows:
1. Save current interrupt state and disable interrupts.
2. Ensure that the Flash byte has been erased (has a value of 0xFF).
3. Set the PSWE bit (register PSCTL).
4. Clear the PSEE bit (register PSCTL).
5. Write the first key code to FLKEY: 0xA5.
6. Write the second key code to FLKEY: 0xF1.
7. Using the MOVX instruction, write a single data byte to the desired location within the 512-byte sector.
8. Clear the PSWE bit.
9. Restore previous interrupt state.
Steps 5–7 must be repeated for each byte to be written.
Note: Flash security settings may prevent writes to some areas of Flash, such as the reserved area. For a summary
22.2. Non-volatile Data Storage
The Flash memory can be used for non-volatile data storage as well as program code. This allows data
such as calibration coefficients to be calculated and stored at run time. Data is written using the MOVX
write instruction and read using the MOVC instruction.
Note: MOVX read instructions always target XRAM.
22.3. Security Options
The CIP-51 provides security options to protect the Flash memory from inadvertent modification by soft-
ware as well as to prevent the viewing of proprietary program code and constants. The Program Store
Write Enable (bit PSWE in register PSCTL) and the Program Store Erase Enable (bit PSEE in register
PSCTL) bits protect the Flash memory from accidental modification by software. PSWE must be explicitly
set to 1 before software can modify the Flash memory; both PSWE and PSEE must be set to 1 before soft-
ware can erase Flash memory. Additional security features prevent proprietary program code and data
constants from being read or altered across the C2 interface.
A Security Lock Byte located at the last byte of Flash user space offers protection of the Flash program
memory from access (reads, writes, and erases) by unprotected code or the C2 interface. The Flash secu-
rity mechanism allows the user to lock all Flash pages, starting at page 0, by writing a non-0xFF value to
the lock byte. Note that writing a non-0xFF value to the lock byte will lock all pages of FLASH from
reads, writes, and erases, including the page containing the lock byte.
The level of Flash security depends on the Flash access method. The three Flash access methods that
can be restricted are reads, writes, and erases from the C2 debug interface, user firmware executing on
containing the lock bytes. For a summary of Flash security settings and restrictions affecting Flash erase
operations, please see Section “22.3. Security Options” on page 149.
of Flash security settings and restrictions affecting Flash write operations, please see Section “22.3. Security
Options” on page 149.
Rev. 1.0
C8051F70x/71x
149
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