C8051F544-IQR Silicon Labs, C8051F544-IQR Datasheet - Page 272
C8051F544-IQR
Manufacturer Part Number
C8051F544-IQR
Description
8-bit Microcontrollers - MCU 50 MIPS 8 kB 1kB LIN 2.1 SPI UART I2C
Manufacturer
Silicon Labs
Datasheet
1.C8051F546-IMR.pdf
(274 pages)
Specifications of C8051F544-IQR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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C8051F54x
25.2. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and
Flash programming may be performed. This is possible because C2 communication is typically performed
when the device is in the halt state, where all on-chip peripherals and user software are stalled. In this
halted state, the C2 interface can safely ‘borrow’ the C2CK (RST) and C2D pins. In most applications,
external resistors are required to isolate C2 interface traffic from the user application. A typical isolation
configuration is shown in Figure 25.1.
The configuration in Figure 25.1 assumes the following:
1. The user input (b) cannot change state while the target device is halted.
2. The RST pin on the target device is used as an input only.
Additional resistors may be necessary depending on the specific application.
272
Output (c)
RST (a)
Input (b)
Figure 25.1. Typical C2 Pin Sharing
C2 Interface Master
Rev. 1.1
C2CK
C2D
C8051Fxxx
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