ST8024LTR STMicroelectronics, ST8024LTR Datasheet - Page 20
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ST8024LTR
Manufacturer Part Number
ST8024LTR
Description
Interface - Specialized Smart card interface 3V or 5V 26 MHz
Manufacturer
STMicroelectronics
Datasheet
1.ST8024LTR.pdf
(35 pages)
Specifications of ST8024LTR
Product Category
Interface - Specialized
Rohs
yes
Product Type
Smart Card Interface
Operating Supply Voltage
2.7 V to 6.5 V
Supply Current
1.2 mA
Maximum Power Dissipation
0.56 W
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-20
Minimum Operating Temperature
- 25 C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST8024LTR
Manufacturer:
STMicroelectronics
Quantity:
2 000
Functional description
6.3
20/35
Clock circuitry (only on SO-28 and TSSOP-28 packages)
The card clock signal (CLK) is derived from a clock signal input to pin XTAL1 or from
a crystal operating at up to 26 MHz connected between pins XTAL1 and XTAL2.
The clock frequency can be f
is made via inputs CLKDIV1 and CLKDIV2 (see
Table 21.
1. The status of pins CLKDIV1 and CLKDIV2 must not be changed simultaneously; a delay of 10 ns minimum
The frequency change is synchronous, which means that during transition no pulse is
shorter than 45% of the smallest period, and that the first and last clock pulses regarding the
instant of change have the correct width.
When changing the frequency dynamically, the change is effective for only eight periods of
XTAL1 after the command. The duty factor of f
XTAL1. In order to reach a 45 to 55% duty factor on pin CLK, the input signal on pin XTAL1
should have a duty factor of 48 to 52% and transition times of less than 5% of the input
signal period.
If a crystal is used, the duty factor on pin CLK may be 45 to 55% depending on the circuit
layout and on the crystal characteristics and frequency. In other cases, the duty factor on pin
CLK is guaranteed between 45 and 55% of the clock period.
The crystal oscillator runs as soon as the ST8024L is powered up. If the crystal oscillator is
used, or if the clock pulse on pin XTAL1 is permanent, the clock pulse is applied to the card
as shown in the activation sequences in
If the signal applied to XTAL1 is controlled by the system microcontroller, the clock pulse is
applied to the card when it is sent by the system microcontroller (after completion of the
activation sequence).
between changes is needed. The minimum duration of any state of CLK is eight periods of XTAL1.
CLKDIV1
Clock frequency selection
0
0
1
1
XTAL
Doc ID 17709 Rev 5
, 1/2 x f
XTAL
Figure 5
(1)
CLKDIV2
, 1/4 x f
0
1
1
0
XTAL
Table
and
depends on the signal present at pin
XTAL
Figure
21).
, or 1/8 x f
6.
XTAL
. Frequency selection
f
f
f
XTAL
XTAL
XTAL
f
f
XTAL
CLK
/8
/4
/2
ST8024L