E910.54B37AB ELMOS Semiconductor, E910.54B37AB Datasheet
E910.54B37AB
Specifications of E910.54B37AB
Related parts for E910.54B37AB
E910.54B37AB Summary of contents
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... SPI Bus Driver INTN BM E910.54 GND ELMOS Semiconductor AG General Description The low cost basic FlexRay™ transceiver is part of the electrical, physical layer in a FlexRay™ communication network. The E910.54 provides an interface between the twisted pair physical bus medium and a commu- nication controller (CC). An SPI interface connects the ...
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... BP AIO 14 VCC Digital Communication controller A = Analog S = Supply I = Input O = Output HV = High Voltage PU = Pull- Pull-Down ELMOS Semiconductor AG Pin description 1) IO Supply Transmit Data Input (from Transmit Data Enable (from CC Receive Data Output ( reserved (for ELMOS internal test purposes only) ...
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... ESD voltage HBM according to 6 AEC-Q100 3) (chip level) 1) Minimum value at -40...95°C. Minimum value at +95...125°C VBP = VBM = -17V. 2) Cs=150pF 330Ω 3) Cs=100pF, Rd=1500Ω 4) Pulse 1, 2a, 3a, 3b according to ISO7637-1, -2 class C ELMOS Semiconductor AG VIO VCC 1 14 TXD TXEN ...
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... Parameter condition Transceiver 1 Supply Voltage IO Supply 2 3.3V interface Voltage (1 IO Supply 3 5V interface Voltage (1 Operating 4 Temperature Range 1) 3.3V, optional 5V power supply ELMOS Semiconductor AG condition symbol Corner pins (1,6,7,14) Other pins (2-5, 8-13) Pins BP and BM R TJA Tamb ≤ 125 °C P diss STG symbol Min VCC 4 ...
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... Low level output 2mA voltage load 5 Pull up current at TXEN, VIO=5V 6 Pull down current at TXD, VIO=5V The data lines TXD and TXEN from and RXD to the Communication Controller are at VIO level. ELMOS Semiconductor AG symbol Min typ ICCni 2.5 ICCna 30 1) IVIO 35 POR 1.6 ...
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... Upper receiver 1 threshold for de- Idle Y Data_1 tecting activity Lower receiver 2 threshold for de- Idle Y Data_0 tecting activity Receiver thresh- 3 old for detecting Data_0 Y Data_1 Data_1 ELMOS Semiconductor AG symbol Min typ VIH_SCSN, VIH_SCK, 0.7·VIO VIH_SDI VIL_SCSN, VIL_SCK, VIL_SDI VOH_SDO, 0.8·VIO VOH_INTN VOL_SDO, VOL_INTN ...
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... Receiver delay positive edge (2 Receiver delay 16 mismatch (1 Guaranteed by design, only the idle and activity reaction times are tested (2 RxD tested at 50% VIO thresholds (3 dRxAsym=|dBDRx10 - dBDRx01| ELMOS Semiconductor AG symbol Min typ uData_0 -300 ||Data_0|- |uData_1|| uCM -10 RCM1 ...
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... TxD, TxEN tested at 50% VIO thresholds 2) Guaranteed by design, conform to the range 10%-90% and rise and fall times 5….25ns. 3) dTxAsym= |dBDTx10 - dBDTx01 means R in parallel with C load load load 5) In accordance with the EPL 2.1a ELMOS Semiconductor AG symbol Min 4) = uBDTx- load 600 active = load ...
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... Fig. 3. Both ends of the cable are terminated (connected to Node1 and Node 2). All transceivers connected to other nodes are unterminated. The maximum number of stub nodes in a FlexRay passive bus is 22. If the dis- tance between the stub splices is nearly zero, a passive star network emerges from the passive bus. ELMOS Semiconductor AG symbol Min VCCOK_N 4 ...
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... Figure 4: Bus drivers in a active star bus configuration The active star configuration (Fig. 4) shows a better performance than a passive one. There are no unterminated nodes, all termination resistances are equal. The maximum cable length per branch may be chosen ELMOS Semiconductor AG Node 5 Node 3 ...
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... The BD_Standby mode is a low power mode. The BD enters the state BD_Standby after VCC and VIO power on. The BD is not able to send or receive data signals from the bus. The power consumption is reduced compared to BD_Normal. The bus wires are terminated to GND via receiver input resistance. ELMOS Semiconductor AG Sensor Actuator VBAT ...
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... The transitions are depicted in the following operation state diagram. 4.1.3.3 Operation mode transitions state diagram Figure 6: E910.54 operation mode state diagram transition low to high transition after a low phase (minimum dScsnLow, see 3.3) ELMOS Semiconductor AG BD_Normal BD_Standby Start conditions VCC power on SPI command (Goto_Normal bit = ‘ ...
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... The E910.54 provides an overtemperature supervision. In case the junction temperature rises above the overtem- perature detection threshold the OTEMP flag is set in the SPI register and the INTN pin changes to ‚low’. The BD outputs send idle state to the bus. ELMOS Semiconductor AG Bus Failure Detector ...
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... SPI accesses is dspid. For an efficient register access, a protocol has been defined with the following features: • Pure master-slave protocol with host controller as master • Frame is delimited by the status of SCSN (SCSN = frame delimiter) ELMOS Semiconductor AG 16 clocks /cycle 1 2 ...
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... The mode change due to a undervoltage at the supply voltage does not change the SPI registers. bit ELMOS Semiconductor AG Failure if INTN=0 Failure sum signal VCCOK=0 Low active VIOOK=0 Low active OTEMP=1 Junction overtemperature TxENLOW=1 Flag is set after dTOTxEN BP2GND=1 Bus error BP2VSUP=1 ...
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... The numerical values are defined in chapter 3.4.1. uBus is the differential bus voltage. ubus 0V -30mV -300mV -uRx vRxD/viO 1 0.7 0.3 0 Figure 9: Receiver characteristics ELMOS Semiconductor AG sPi register sPi register address ReaD WRite 3 OTEMP don't care 2 Always 1 don't care 1 ...
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... TxEN is low. The transmitter delay is defined as the duration for transferring the digital TxD signal to the analog information on the bus as depicted in the following figure. The numerical values are defined in chapter 3.4.2. uBus is the dif- ferential bus voltage. ELMOS Semiconductor AG dRx 10 dRx 01 dRx 0 ...
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... Fig. 12 shows the situation at the start and the end of the transmission assumed that TxD is low (if TxD was high, the differential bus voltage would be positive). The numerical values are defined in chapter 3.4.2. vtxen/viO 1 0.7 0.8 0 ubus 0V -30mV -300mV -uBDTx Figure 13: Transmitter timing characteristics ELMOS Semiconductor AG 100ns 100ns dBDTx 10 dBDTx 01 dBusTx 10 dBusTx 01 dTxEN 0 dBDTxia dBDTxai dBusTxia dBusTxai Data sheet 18/28 E910 ...
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... Defect of the error signaling lines 9 INTN interrupted Defect of the error signaling lines. 10 INTN shorted to GND Defect of the error signaling lines. 11 SPI lines interrupted ELMOS Semiconductor AG behaviour of the ic High impedance at BP INTN permanently LOW and BM SDO permanently LOW High impedance at BP INTN permanently LOW and BM ...
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... Bus load too high Undervoltage on VIO 20 (VCC available) ELMOS Semiconductor AG behaviour of the ic No detection by BD itself. Software plausibility check. Analysis of the SPI response e.g. 0x0000. No detection by BD itself. Software plausibility check. Comparison of the INTN level with SPI failure flags ...
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... Furthermore, a ground shift between the nodes may be recognized as short circuit, especially if the transmitter needs a longer time to set the common mode bus voltage to its steady state value. This may occur if a split termi- nation with capacitors in the range used. ELMOS Semiconductor ...
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... ELMOS packages meet the requirements of the latest JEDEC outline specifications. All JEDEC outline specifica- tions may be freely downloaded from http://www.jedec.org or please contact your local ELMOS key account manager. 6.2 Marking 6.2.1 top side 6.2.2 bottom side No marking ELMOS Semiconductor AG VCC VIO BP E910.54 BM GND ...
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... The compound of ELMOS devices do not contain halogens (including bromine) and inorganic (red) phosphorous as an alternative flame-retardant system. Note, this status depends on the current understanding of RoHS and ELMOS knowledge of the materials which were used for assembly. ELMOS Semiconductor AG Data sheet QM-No.: 25DS0004.00 2010-02-03 23/28 E910.54 ...
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... Serial Peripheral Interface TSS Transmission Start Sequence contact In case of any application related or general technical questions please contact application-support@elmos.eu. In all other cases info@elmos.de or: ELMOS Semiconductor AG ELMOS Semiconductor AG Heinrich-Hertz-Strasse 1 44227 Dortmund Germany Phone: +49 231 7549 – 100 Fax: +49 231 7549 – 159 Data sheet 24/28 E910 ...
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... Undervoltages and Overtemperature ................................................................................................................................ 19 4.2.6.2 Interface failure detection ...................................................................................................................................................... 19 4.2.6.3 List of conditions, bus driver actions and signaling ........................................................................................................ 19 4.2.6.4 Bus failure detection methods .............................................................................................................................................. 21 5 ISO7637 pulse test implementation .............................................................................................................................................. 22 6 Package .....................................................................................................................................................................................................22 6.1 Package outline .................................................................................................................................................................................. 22 6.2 Marking ................................................................................................................................................................................................ 22 6.2.1 Top side ............................................................................................................................................................................................. 22 6.2.2 Bottom side ..................................................................................................................................................................................... 22 6.3 RoHS conformance ........................................................................................................................................................................... 23 Abbreviations ............................................................................................................................................................................................ 24 Contact .....................................................................................................................................................................................................24 ELMOS Semiconductor AG Data sheet QM-No.: 25DS0004.00 2010-02-03 25/28 E910.54 ...
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... Figure 7: E910.54 simplified block diagram ..................................................................................................................................... 13 Figure 8: E910.54 SPI communication cycle .................................................................................................................................... 14 Figure 9: Receiver characteristics ........................................................................................................................................................ 16 Figure 10: Receiver timing characteristics ....................................................................................................................................... 17 Figure 11: Biasing circuit of the receiver ........................................................................................................................................... 17 Figure 12: Transmitter characteristics ............................................................................................................................................... 18 Figure 13: Transmitter timing characteristics ................................................................................................................................. 18 Figure 14: Possible bus failures ............................................................................................................................................................ 21 Figure 15: ISO7637 pulse test implementation .............................................................................................................................. 22 ELMOS Semiconductor AG Data sheet QM-No.: 25DS0004.00 2010-02-03 26/28 E910.54 ...
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... General Disclaimer Information furnished by ELMOS Semiconductor AG is believed to be accurate and reliable. However, no responsi- bility is assumed by ELMOS Semiconductor AG for its use, nor for any infringements of patents or other rights of third parties, which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of ELMOS Semiconductor AG ...
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... ELMOS Semiconductor AG – Headquarters Heinrich-Hertz-Str 44227 Dortmund | Germany Phone + 49 (0) 231 - 100 | Fax + 49 (0) 231 - 149 sales@elmos.de | www.elmos.de 28/28 ...