74LVC1G14GW-Q100,1 NXP Semiconductors, 74LVC1G14GW-Q100,1 Datasheet
74LVC1G14GW-Q100,1
Specifications of 74LVC1G14GW-Q100,1
Related parts for 74LVC1G14GW-Q100,1
74LVC1G14GW-Q100,1 Summary of contents
Page 1
Single Schmitt trigger inverter Rev. 1 — 9 July 2012 1. General description The 74LVC1G14-Q100 provides the inverting buffer function with Schmitt trigger input capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. ...
Page 2
... Package Temperature range Name 40 C to +125 C 74LVC1G14GW-Q100 40 C to +125 C 74LVC1G14GV-Q100 5. Marking Table 2. Marking Type number 74LVC1G14GW-Q100 74LVC1G14GV-Q100 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram mna023 Fig 1. ...
Page 3
... NXP Semiconductors 7. Pinning information 7.1 Pinning Fig 4. Pin configuration SOT353-1 and SOT753 7.2 Pin description Table 3. Pin description Symbol Pin n. GND Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level 74LVC1G14_Q100 Product data sheet 74LVC1G14-Q100 n ...
Page 4
... NXP Semiconductors 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O I input clamping current IK I output clamping current OK I output current ...
Page 5
... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V LOW-level output voltage = 100 input leakage GND ...
Page 6
... NXP Semiconductors Table 8. Transfer characteristics Voltages are referenced to GND (ground = 0 V); for load circuit see Symbol Parameter Conditions V hysteresis voltage ( Figure [1] All typical values are measured at T 12. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for load circuit see ...
Page 7
... NXP Semiconductors 13. Waveforms Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 5. The data input (A) to output (Y) propagation delays Table 10. Measurement points Supply voltage 1. 2.7 V 2 3 5.5 V ...
Page 8
... NXP Semiconductors Table 11. Test data Supply voltage Input 2.7 V 2 3.6 V 2 14. Waveforms transfer characteristics T− Fig 7. Transfer characteristic Fig 9. Typical transfer characteristics 74LVC1G14_Q100 Product data sheet Load ...
Page 9
... NXP Semiconductors 15. Application information The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula add P = additional power dissipation (W); add f = input frequency (MHz input rise time (ns input fall time (ns ...
Page 10
... NXP Semiconductors 16. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE ...
Page 11
... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions) UNIT 0.100 1.1 0.40 0.26 mm 0.013 0.9 0.25 0.10 OUTLINE VERSION IEC SOT753 Fig 13. Package outline SOT753 (SC-74A) 74LVC1G14_Q100 Product data sheet scale ...
Page 12
... NXP Semiconductors 17. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor TTL Transistor-Transistor Logic HBM Human Body Model ESD ElectroStatic Discharge MM Machine Model DUT Device Under Test MIL Military 18. Revision history Table 13. Revision history Document ID Release date 74LVC1G14_Q100 v.1 20120709 74LVC1G14_Q100 ...
Page 13
... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
Page 14
... NXP Semiconductors No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations ...
Page 15
... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 Functional description . . . . . . . . . . . . . . . . . . . 3 9 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 13 Waveforms ...