TSS461F-TDRZ-9 Atmel, TSS461F-TDRZ-9 Datasheet - Page 36

• Manufacturer Part Number: TSS461F-TDRZ-9
• Description: Network Controller & Processor ICs Van Data Link Controller
• Manufacturer: Atmel

ID_T [11:0]: Identifier
Tag
EXT, RAK, RNW &
RTR: (See
section “Retries,
Rearbitrate and Abort”)
Message Pointer
Register
DRAK: Disable RAK
(Used in 'Spy Mode')
M_P [6:0]: Message
Pointer
36
TSS461F
Upon a reception hit (i.e, a good comparison between the identifier received and an identifier
specified, taking the comparison mask into account, as well as a status and command indicating
a message to be received, the identifier tag bits value will be rewritten with the identifier bits
actually received.
No comparison will be done on the command bits, except on EXT bit. The RAK, RNW and RTR
bits will be written into the first byte of the Message upon a reception hit.
The RNW and RTR bits, as well as the status bits in the length and status register, must be in a
valid position for reception or transmission. If not, the message corresponding to this identifier is
considered as inactive or invalid.
The way of knowing if an acknowledge sequence was requested or not is to check the first byte
of the Message.
The message pointer register at address (base_address + 0x02) is 8 bits wide. It indicates
where, in the Message DATA RAM area, the message buffer is located.
•
In reception: whatever is the RAK bit of the incoming valid frame, no ACK answer will be set. If
the message was successfully received, an IT is set (ROK or RNOK).
In transmission: no action.
One: disable active, 'spy' mode.
Zero: disable inactive, normal operation.
Since the Message DATA RAM area base address is 0x80, the value in this register is the offset
from that address. If the message buffer length value is illegal (i.e. zero), this register is rede-
fined as being a link pointer, thus containing the channel number of the channel that contains the
actual message pointer, message length and received status. However, the identifier, mask,
error and transmitted status used will be the originally matched channel. In any case, if a link is
intended, the three high bits of M_P [6:0] should be set to 0.
This allows several channels to use the same actual reception buffer in Message DATA RAM,
thus diminishing the memory usage.
Note that only 1 level of link is supported.
Read/Write register
DRAK
7
M_P 6
6
M_P 5
5
M_P 4
4
M_P 3
3
M_P 2
2
M_P 1
1
M_P 0
0
7615A–AUTO–02/06
base_address
+ 0x02