XRT83L38ES Exar, XRT83L38ES Datasheet - Page 35

• Manufacturer Part Number: XRT83L38ES
• Description: Peripheral Drivers & Components - PCIs
• Manufacturer: Exar

Specifications of XRT83L38ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

REV. 1.0.2
In Hardware mode, RXTSEL (Pin 83) can be tied “High” to select internal termination mode for all receive
channels or tied “Low” to select external termination mode. Individual channel control can only be done in Host
mode. By default the XRT83L38 is set for external termination mode at power up or at Hardware reset.
In Host mode, bit 7 in the appropriate channel register,
Description,” on page
channel.
F
If the internal termination mode (RXTSEL = “1”) is selected, the effective impedance for E1, T1 or J1 can be
achieved either with an internal resistor or a combination of internal and external resistors as shown in
N
IGURE
OTE
RXTSEL
RNEG
T NEG
R PO S
T PO S
T CLK
RCLK
: In Hardware mode, pins RXRES[1:0] control all channels.
0
1
1
1
13. S
IMPLIFIED
TERSEL1
Line Driver
x
0
0
1
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
Equalizer
T X
RX
D
51), is set “High” to select the internal termination mode for that specific receive
IAGRAM FOR THE
TERSEL0
0
1
0
x
T
ABLE
Channel _n
RXTSEL
R
R
int
int
T
ABLE
0
1
6: R
I
RXRES1
NTERNAL
R
int
0
0
0
x
ECEIVE
7: R
TRIN G
RRING
ECEIVE
RTIP
R
TTIP
T
ECEIVE AND
32
ERMINATION
RXRES0
T
ERMINATIONS
x
0
0
0
RX TERMINATION
0.68
(Table 20, “Microprocessor Register #1, Bit
EXTERNAL
μ
INTERNAL
F
T
C
RANSMIT
ONTROL
1
4
5
8
R
R
∞
∞
∞
ext
ext
1:1
T 1
T 2
1:2
T
ERMINATION
5
1
8
4
100 Ω
110 Ω
75 Ω
R
∞
int
M
ODE
XRT83L38
RTIP
RR ING
TTIP
TRING
75
110
75
110
T1/E1/J1
Ω
Ω
Ω
Ω
M
, 100
, 100
E1
T1
J1
or 120
or 120
ODE
Table
Ω
Ω
Ω
Ω
7.