XRT83SL30ES Exar, XRT83SL30ES Datasheet - Page 27

• Manufacturer Part Number: XRT83SL30ES
• Description: Peripheral Drivers & Components - PCIs 1 CHT1/E1 LIUSH
• Manufacturer: Exar

Specifications of XRT83SL30ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

REV. 1.0.1
The driver monitor circuit is used to detect transmit driver failure by monitoring the activities at TTIP and
TRING. Driver failure may be caused by a short circuit in the primary transformer or system problems at the
transmit input. If the transmitter has no output for more than 128 clock cycles, the corresponding DMO pin
goes “High” and remains “High” until a valid transmit pulse is detected. In Host mode, the failure of the transmit
channel is reported in the corresponding interface bit. If the DMOIE bit is also enabled, any transition on the
DMO interface bit will generate an interrupt. The driver failure monitor is supported in both Hardware and Host
modes.
TRANSMIT PULSE SHAPER & LINE BUILD OUT (LBO) CIRCUIT
The transmit pulse shaper circuit uses the high speed clock from the Master timing generator to control the
shape and width of the transmitted pulse. The internal high-speed timing generator eliminates the need for a
tightly controlled transmit clock (TCLK) duty cycle. With the jitter attenuator not in the transmit path, the
transmit output will generate no more than 0.025Unit Interval (UI) peak-to-peak jitter. In Hardware mode, the
state of the EQC[4:0] pins determine the transmit pulse shape. In Host mode transmit pulse shape can be
controlled using the interface bits EQC[4:0]. The chip supports five fixed transmit pulse settings for T1 Short-
haul applications plus a fully programmable waveform generator for arbitrary transmit output pulse shapes.
The choice of the transmit pulse shape under the control of the interface bits are summarized in
N
OTE
EQC4
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
: EQC[4:0] determine the T1/E1 operating mode of the XRT83SL30. When EQC4 = “1” and EQC3 = “1”, the
XRT83SL30 is in the E1 mode, otherwise it is in the T1/J1 mode.
EQC3
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
T
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
ABLE
EQC2
5: R
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
ECEIVE
EQC1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
E
QUALIZER
EQC0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
C
ONTROL AND
T1/E1 M
T1 Gain Mode/29dB
T1 Gain Mode/29dB
T1 Gain Mode/29dB
T1 Gain Mode/29dB
T1 Gain Mode/29dB
T1 Gain Mode/29dB
T1 Short Haul/15dB
T1 Short Haul/15dB
T1 Short Haul/15dB
T1 Short Haul/15dB
T1 Short Haul/15dB
T1 Short Haul/15dB
E1 Gain Mode
E1 Gain Mode
E1 Short Haul
E1 Short Haul
S
ENSITIVITY
24
ODE
& R
T
RANSMIT
ECEIVE
L
133-266 ft./ 1.2dB
266-399 ft./ 1.8dB
399-533 ft./ 2.4dB
533-655 ft./ 3.0dB
133-266 ft./ 1.2dB
266-399 ft./ 1.8dB
399-533 ft./ 2.4dB
533-655 ft./ 3.0dB
INE
T
0-133 ft./ 0.6dB
Arbitrary Pulse
Arbitrary Pulse
0-133 ft./ 0.6dB
RANSMIT
ITU G.703
ITU G.703
ITU G.703
ITU G.703
B
UILD
-O
LBO
UT
S
ETTINGS
75Ω Coax
75Ω Coax
100Ω/ TP
100Ω/ TP
100Ω/ TP
100Ω/ TP
100Ω/ TP
100Ω/ TP
100Ω/ TP
100Ω/ TP
100Ω/ TP
100Ω/ TP
100Ω/ TP
100Ω/ TP
120Ω TP
120Ω TP
C
ABLE
XRT83SL30
Table
C
B8ZS
B8ZS
HDB3
HDB3
HDB3
HDB3
5.
B8ZS
B8ZS
B8ZS
B8ZS
B8ZS
B8ZS
B8ZS
B8ZS
B8ZS
B8ZS
ODING