XRT7295A/98ES-DS3 Exar, XRT7295A/98ES-DS3 Datasheet - Page 3

• Manufacturer Part Number: XRT7295A/98ES-DS3
• Description: Peripheral Drivers & Components - PCIs comeswith XRT7295A
• Manufacturer: Exar

Specifications of XRT7295A/98ES-DS3

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

PIN DESCRIPTION
Pin #
3,6
4,5
12
13
10
11
14
15
16
17
18
19
20
1
2
7
8
9
Rev. 2.0.0
TMC1-TMC2
LPF-1-LPF-2
RNDATA
RPDATA
LOSTHR
Symbol
EXCLK
GNDA
GNDD
GNDC
REQB
RLOS
RLOL
RCLK
V
V
V
ICT
R
DD
DD
DD
IN
D
C
A
Type
O
O
O
O
O
I
I
I
I
I
I
I
Description
Analog Ground.
Receive Input. Unbalanced analog receive input
Test Mode Control 1 and 2. Internal test modes are enabled within the device
by using TMC1 and TMC2. Users must tie these pins to the ground plane.
PLL Filter 1 and 2. An external capacitor (0.1 F +/-20%) is connected
between these pins (See Figure 3).
Receive Loss-of-Signal. This pin is set high on loss of signal at the receive
input.
Receive PLL Loss-of-Lock. This pin is set high on loss of PLL frequency lock.
Digital Ground for PLL Lock. Ground lead for all circuitry running
synchronously with PLL clock.
Digital Ground for EXCLK. Ground lead for all circuitry running
synchronously with EXCLK.
5V Digital Supply (+/-10%) for PLL Clock. Power for all circuitry running
synchronously with PLL clock.
5V Digital Supply (+/-10%) for EXCLK. Power for all circuitry running
synchronously with EXCLK.
External Reference Clock. A valid E3 (34.368MHz +/-100ppm) clock must be
provided at this input. The duty cycle of EXCLK, referenced to V
must be 40%-60%.
Receive Clock. Recovered clock signal to the terminal equipment.
Receive Negative Data. Negative pulse data output to the terminal
equipment.
Receive Positive Data. Positive pulse data output to the terminal equipment.
Output In-Circuit Test Control (Active-Low). If ICT is forced low, all digital
output pins (RCLK, RPDATA, RNDATA, RLOS, RLOL) are placed in a high-
impedance state to allow for in-circuit testing.
Receive Equalization Bypass. A high on this pin bypasses the internal
equalizer. A low places the equalizer in the data path.
Loss-of-Signal Threshold Control. The voltage forced on this pin controls the
input loss-of-signal threshold. Three settings are provided by forcing the GND,
V
5V Analog Supply (+/-10%).
DD
/2, or V
DD
at LOSTHR.
3
XRT7295AE
DD
/2 levels,