XRT7295A/98ES-DS3 Exar, XRT7295A/98ES-DS3 Datasheet - Page 5

• Manufacturer Part Number: XRT7295A/98ES-DS3
• Description: Peripheral Drivers & Components - PCIs comeswith XRT7295A
• Manufacturer: Exar

Specifications of XRT7295A/98ES-DS3

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

SYSTEM DESCRIPTION
Receive Path Configurations
The diagram in Figure 2 shows a typical system
application for the XRT7295AE. In the receive signal
path (see Figure 1), the internal equalizer can be
included by setting REQB=0 or bypass by setting
REQB=1. The equalizer bypass option allows easy
interfacing of the XRT7295AE into systems already
containing the external equalizers. Figure 3 illustrates
the receive path option for two separate cases.
In case 1, the signal from the coaxial cable feeds
directly into the R
set REQB=0, engaging the equalizer in the data path
if the cable loss is greater than 6dB. If the cable loss
is less than 6dB, the equalizer is bypassed by setting
the REQB=1.
In case 2, an external line and equalizer network
precedes the XRT7295AE. In this mode, the signal at
R
should be bypassed by setting REQB1=1. In both
cases, the signal at R
described in Table 1.
The recommended receive termination is also shown in
Figure 3. The 75 resistor terminates the coaxial cable
with its characteristic impedance. In Figure 3 case 2,
if the fixed equalizer includes the line termination, the
75 resistor is not required. The signal is AC coupled
through the 0.01 F capacitor to R
is generated internally. The input capacitance at the
R
IN
IN
pin is typically 2.8pF (SOJ package).
is already equalized, and the on-chip equalizer
Rev. 2.0.0
XRT7295AE
XRT7296
Transmitter
IN
input. In this mode, the user should
IN
must meet the amplitude limits
IN
. The DC bias at R
Figure 2. Application Diagram
IN
5
Pulse Mask at the 34.368 Mbps Interface
Table 2 shows the pulse specifications at the transmit-
ter output post and Figure 4 shows the pulse mask
requirement for E3 as recommended in G.703.
NOTES:
1 Maximum input amplitude under all conditions is 1.1
2 The SOJ package performance is enhanced by de-
3 Although system designers typically use power in dBm
REQB
Vpk.
creased package parasitics.
to describe input levels, the XRT7295AE responds to
peak input signal amplitude. Therefore, the
XRT7295AE input signal limits are given in mV pk.
Table 1. Receive Input Signal Amplitude
0
1
LOSTHR
V
V
V
V
DD
DD
0
0
DD
DD
Requirements
/2
/2
XRT7295AE
SOJ2
XRT7296
Transmitter
XRT7295AE
80
60
40
80
80
80
Minimum Signal
DIP
115
115
115
115
85
60
mV pk
mV pk
mV pk
mV pk
mV pk
mV pk
Unit3