AT24C1024BN-SH25-B Atmel, AT24C1024BN-SH25-B Datasheet - Page 24

IC EEPROM 1MBIT 1MHZ 8SOIC

AT24C1024BN-SH25-B

Manufacturer Part Number
AT24C1024BN-SH25-B
Description
IC EEPROM 1MBIT 1MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT24C1024BN-SH25-B

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
1M (128K x 8)
Speed
1MHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Organization
128 K x 8
Interface Type
2-Wire
Maximum Clock Frequency
1 MHz
Access Time
550 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V, 5 V
Memory Configuration
131072 X 8
Clock Frequency
1MHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
SOIC
No. Of Pins
8
Rohs Compliant
Yes
Density
1Mb
Access Time (max)
550ns
Frequency (max)
1MHz
Write Protection
Yes
Data Retention
40Year
Operating Supply Voltage (typ)
3.3/5V
Operating Temp Range
-40C to 85C
Supply Current
3mA
Operating Supply Voltage (min)
2.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT24C1024BN-SH25-B
Manufacturer:
AMTLE
Quantity:
1 760
Part Number:
AT24C1024BN-SH25-B
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
10. Revision History
24
AT24C1024B
Doc. No.
5194F
5194E
5194D
5194C
5194B
5194A
Date
1/2008
8/2007
5/2007
4/2007
2/2007
1/2007
Comments
Removed ‘NiPdAu’ from AT24C1024BU4-UU-T
Removed ‘Preliminary’ status
Updated Part Marking Scheme
Updated to new Template
Updated to common figures
Added Package Marking tables
Changed ‘Advance Information’ to ‘Preliminary’
Reduced Pin Configuration sizes
Changed Maximum Operating Voltage from 6.0 to 6.25
Removed Device Power Up & Power Down Recommendation
Added A2 bit to Device Addressing
Removed LSB from Figure 10 Current Address Read
Removed reference to Waffle Pack
Modified Ordering Code table lines
Global change on Voltage from 3.6 to 5.5, Correct pg 1 drawings to
include address inputs
Correct pg 1 TSSOP drawing
Initial Document Release
(2)
5194F–SEEPR–1/08

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