79RC32H434-300BC IDT, 79RC32H434-300BC Datasheet - Page 21

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79RC32H434-300BC

Manufacturer Part Number
79RC32H434-300BC
Description
Processors - Application Specialized
Manufacturer
IDT
Datasheet

Specifications of 79RC32H434-300BC

Part # Aliases
IDT79RC32H434-300BC
Memory and Peripheral Bus
MADDR[21:0]
MADDR[25:22]
IDT RC32434
Signal
DDRDATA[15:0]
DDRADDR[13:0]
Symbol
Tdz_8a
Tzd_8a
Tdz_8b
Tzd_8b
DDRDM[1:0]
Tdo_8a
Tdo_8b
DDRBA[1:0]
1
2
(see Chapter 7, DDR Controller, in the RC32434 User Reference Manual).
DDRCMD
DDRDQSx
DDRDQSx
DDRCMD contains DDRRASN, DDRCASN and DDRWEN.
DDRDATA is either 32-bits or 16-bits wide depending on the DBW control bit in DDRC Register
DDRCKP
DDRCKN
DDRCSN
DDRCKE
2
2
2
2
1
EXTCLK rising
EXTCLK rising
Reference
1
2
Edge
NOP
Table 8 Memory and Peripheral Bus AC Timing Characteristics (Part 1 of 2)
Tdo_7m
Tdo_7m
Tdo_7m
Tdo_7m
Min
0.4
0.4
BNKx
266MHz
RowA
ACTV
Figure 7 DDR SDRAM Timing Waveform — Write Access
FF
Max
4.5
4.5
NOP
Min
0.4
0.4
300MHz
Col A0
WR
Tdo_7l
BNKx
21 of 53
Max
4.5
4.5
Tdo_7k
Col A2
WR
D0
DM0 DM1
Min
0.4
0.4
350MHz
D1
NOP
Tdo_7k
DM2
D2
Max
4.5
4.5
DM3
Tdo_7l
NOP
D3
Min
0.4
0.4
400MHz
NOP
Max
4.5
4.5
NOP
FF
Unit
ns
ns
ns
ns
ns
ns
Condi-
NOP
tions
January 19, 2006
See Figures 8
and 9.
Reference
Diagram
Timing

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