79RC32H434-300BC IDT, 79RC32H434-300BC Datasheet - Page 29

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79RC32H434-300BC

Manufacturer Part Number
79RC32H434-300BC
Description
Processors - Application Specialized
Manufacturer
IDT
Datasheet

Specifications of 79RC32H434-300BC

Part # Aliases
IDT79RC32H434-300BC
I
SCL
SDA
Start or repeated start
condition
Stop condition
Bus free time between
a stop and start condi-
tion
SCL
SDA
2
C
IDT RC32434
1
Signal
Tdelay_12e
Thigh_12a,
Thigh_12a,
Symbol
Frequency
Frequency
Tfall_12ba
Trise_12a
Trise_12b
Trise_12a
Trise_12b
Tlow_12a
Tlow_12a
Tfall_12a
Thld_12b
Tfall_12b
Thld_12c
Tfall_12a
Thld_12b
Tsu_12b
Tsu_12d
Tsu_12b
Tsu_12c
PCIRSTN (input)
PCI bus signals
MDATA[15:0]
none
SCL rising
SDA falling
SDA rising
none
SCL rising
Reference
RSTN
CLKP
Edge
Figure 13 PCI AC Timing Waveform — PCI Reset in Satellite Mode
Table 11 I
Tdz_10e
266MHz
Min
250
100
4.0
4.7
4.0
4.0
4.7
0.6
0
0
0
0
Tpw_10e
Tpw_10e
2
1000
1000
Max
3.45
C AC Timing Characteristics (Part 1 of 2)
100
300
300
400
300
300
300
300
0.9
300MHz
Min
250
100
4.0
4.7
4.0
4.0
4.7
0.6
0
0
0
0
29 of 53
warm reset
1000
1000
Max
3.45
100
300
300
400
300
300
300
300
0.9
350MHz
Min
250
100
4.0
4.7
4.0
4.0
4.7
0.6
0
0
0
0
1000
1000
Max
3.45
100
300
300
400
300
300
300
300
0.9
400MHz
Min
250
100
4.0
4.7
4.0
4.0
4.7
0.6
0
0
0
0
1000
1000
Max
3.45
100
400
300
300
300
300
300
300
0.9
Unit
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
Conditions
100 KHz
400 KHz
January 19, 2006
Reference
See Figure 14.
Diagram
Timing

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