MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 43

• Manufacturer Part Number: MCIMX255AJM4AR2
• Description: Processors - Application Specialized IMX25 1.2 AUTO
• Manufacturer: Freescale Semiconductor

Specifications of MCIMX255AJM4AR2

• Core: ARM926EJ-S
• Processor Series: MCIMX25
• Maximum Clock Frequency: 400 MHz
• Instruction / Data Cache Memory: 16 KB
• Data Ram Size: 128 KB
• Operating Supply Voltage: 1.15 V to 1.52 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-400
• Interface Type: USB
• Memory Type: DDR2
• Minimum Operating Temperature: - 40 C

3.7.2
Table 35
implementation of the ATA interface on silicon, the bus buffer used, the cable delay and cable skew.
Freescale Semiconductor
tcable1
tcable2
tskew1
tskew2
tskew3
tskew4
tskew5
tskew6
Name
ti_ds
ti_dh
tbuf
tsui
tco
tsu
thi
T
shows parameters used to specify the ATA timing. These parameters depend on the
ATA Timing Parameters
Bus clock period
Set-up time ata_data to ata_iordy edge (UDMA-in only)
UDMA0
UDMA1
UDMA2,UDMA3
UDMA4
UDMA5
Hold time ata_iordy edge to ata_data (UDMA-in only)
UDMA0,UDMA1,UDMA2,UDMA3,UDMA4
UDMA5
Propagation delay bus clock L-to-H to
ata_cs0, ata_cs1, ata_da2, ata_da1, ata_da0, ata_dior, ata_diow, ata_dmack,
ata_data, ata_buffer_en
Set-up time ata_data to bus clock L-to-H
Set-up time ata_iordy to bus clock H-to-L
Hold time ata_iordy to bus clock H-to-L
Maximum difference in propagation delay bus clock L-to-H to any of the
following signals
ata_cs0, ata_cs1, ata_da2, ata_da1, ata_da0, ata_dior, ata_diow,
ata_dmack, ata_data (write), ata_buffer_en
Maximum difference in buffer propagation delay for any of the following signals
ata_cs0, ata_cs1, ata_da2, ata_da1, ata_da0, ata_dior, ata_diow,
ata_dmack, ata_data (write), ata_buffer_en
Maximum difference in buffer propagation delay for any of the following signals
ata_iordy, ata_data (read)
Maximum buffer propagation delay
cable propagation delay for ata_data
cable propagation delay for control signals ata_dior, ata_diow, ata_iordy,
ata_dmack
Maximum difference in cable propagation delay between ata_iordy and
ata_data (read)
Maximum difference in cable propagation delay between (ata_dior, ata_diow,
ata_dmack) and ata_cs0, ata_cs1, ata_da2, ata_da1, ata_da0,
ata_data(write)
Maximum difference in cable propagation delay without accounting for ground
bounce
i.MX25 Applications Processor for Automotive Products, Rev. 9
Table 35. Timing Parameters
Description
Value/Contributing Factor
Peripheral clock frequency
Transceiver
Transceiver
Transceiver
12.0 ns
5.0 ns
4.6 ns
8.5 ns
8.5 ns
2.5 ns
Cable
Cable
Cable
Cable
Cable
15 ns
10 ns
7 ns
5 ns
4 ns
7 ns
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