MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 53

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MCIMX255AJM4AR2

Manufacturer Part Number
MCIMX255AJM4AR2
Description
Processors - Application Specialized IMX25 1.2 AUTO
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MCIMX255AJM4AR2

Core
ARM926EJ-S
Processor Series
MCIMX25
Maximum Clock Frequency
400 MHz
Instruction / Data Cache Memory
16 KB
Data Ram Size
128 KB
Operating Supply Voltage
1.15 V to 1.52 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-400
Interface Type
USB
Memory Type
DDR2
Minimum Operating Temperature
- 40 C
3.7.4.2
Figure 22
(P1–P6) that are shown in the figure. In ungated mode the VSYNC and PIXCLK signals are used, and the
HSYNC signal is ignored.
Freescale Semiconductor
P1
P2
P3
P4
P5
P6
P7
P1
P2
P3
P4
P5
P6
ID
ID
Figure 22. CSI Ungated Clock Mode—Sensor Data at Falling Edge, Latch Data at Rising Edge
shows the ungated clock mode timings of CSI, and
CSI VSYNC to HSYNC time
CSI HSYNC setup time
CSI DATA setup time
CSI DATA hold time
CSI pixel clock high time
CSI pixel clock low time
CSI pixel clock frequency
CSI VSYNC to pixel clock time
CSI DATA setup time
CSI DATA hold time
CSI pixel clock high time
CSI pixel clock low time
CSI pixel clock frequency
Ungated Clock Mode Timing
DATA[15:0]
VSYNC
PIXCLK
i.MX25 Applications Processor for Automotive Products, Rev. 9
Table 42. CSI Ungated Clock Mode Timing Parameters
Parameter
Parameter
Table 41. CSI Gated Clock Mode Timing Parameters
P1
P2
P3
tVSYNC
Symbol
Symbol
tCLKh
tCLKh
tCLKl
tCLKl
tV2H
fCLK
fCLK
tHsu
tDsu
tDsu
tDh
tDh
Table 42
P4
P6
P5
Min.
Min.
67.5
67.5
describes the timing parameters
1.2
1.2
10
10
10
10
1
1
1
48
48
Max.
Max.
10%
10%
Units
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
53

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