74LVX132M_Q Fairchild Semiconductor, 74LVX132M_Q Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/2/252/fairchild_semiconductor_sml.jpg)
74LVX132M_Q
Manufacturer Part Number
74LVX132M_Q
Description
Logic Gates Qd 2-Inp NAND Sc Trg
Manufacturer
Fairchild Semiconductor
Datasheet
1.74LVX132MTC_Q.pdf
(9 pages)
Specifications of 74LVX132M_Q
Product
NAND
Logic Family
74LVX
Number Of Gates
4
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
16 ns, 15.4 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-14
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
©1996 Fairchild Semiconductor Corporation
74LVX132 Rev. 1.4.0
AC Electrical Characteristics
Note:
3. Parameter guaranteed by design t
Capacitance
Note:
4. C
t
OSLH
t
Symbol
Symbol
consumption without load.
Average operating current can be obtained by the eqation: I
PLH
PD
C
C
, t
, t
PD
IN
is defined as the value of the internal equivalent capacitance which is calculated from the operating current
PHL
OSHL
Propagation Delay Time
Output to Output Skew
Input Capacitance
Power Dissipation Capacitance
Parameter
Parameter
OSLH
(3)
|t
3.3 ± 0.3
PLHm
V
(4)
CC
2.7
2.7
3.3
–t
(V)
PLHn
|, t
C
5
L
OSHL
15
50
15
50
50
(pF)
CC(opr.)
Min.
|t
PHLm
Min.
T
A
=
Typ.
C
-------------------------------------------------------- -
T
–t
18
+25°C
4
A
PD
PHLn
6 per Gate
Typ.
10.5
7.0
6.1
9.0
+25°C
V
|
CC
Max.
10
Max.
11.5
16.0
10.6
15.4
f
1.5
1.5
IN
T
I
Min.
CC
A
T
Min.
A
1.0
1.0
1.0
1.0
+85°C
–40°C to
+85°C
–40°C to
Max.
10
Max.
13.0
18.7
12.5
17.5
1.5
1.5
www.fairchildsemi.com
Units
Units
pF
pF
ns
ns