71V424L10YG IDT, 71V424L10YG Datasheet - Page 6

• Manufacturer Part Number: 71V424L10YG
• Description: SRAM 512Kx8 ASYNCHRONOUS 3.3V CMOS SRAM
• Manufacturer: IDT

Specifications of 71V424L10YG

• Rohs: yes
• Part # Aliases: IDT71V424L10YG

Timing Waveform of Read Cycle No. 1
Timing Waveform of Read Cycle No. 2
NOTES:
1. WE is HIGH for Read Cycle.
2. Device is continuously selected, CS is LOW.
3. Address must be valid prior to or coincident with the later of CS transition LOW; otherwise t
4. OE is LOW.
5. Transition is measured ±200mV from steady state.
ADDRESS
IDT71V424S/YS, IDT71V424L/YL, 3.3V CMOS Static RAM
4 Meg (512K x 8-bit)
V
DATA
CC
CURRENT
SUPPLY
ADDRESS
OUT
DATA
OUT
OE
CS
I
I
CC
SB
PREVIOUS DATA
OUT
t
PU
HIGH IMPEDANCE
VALID
t
OH
t
CLZ
t
OLZ
(5)
t
AA
(5)
t
AA
t
ACS
t
RC
6.42
(3)
6
t
RC
(1)
(1, 2, 4)
t
OE
AA
is the limiting parameter.
Commercial and Industrial Temperature Ranges
DATA
DATA
t
CHZ
t
PD
OUT
OUT
(5)
VALID
VALID
t
OHZ
t
OH
(5)
3622 drw 06
3622 drw 07