AS7C1025B-15JINTR Alliance Memory, AS7C1025B-15JINTR Datasheet - Page 2

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AS7C1025B-15JINTR

Manufacturer Part Number
AS7C1025B-15JINTR
Description
SRAM 1M, 5V, 15ns FAST 128K x 8 Asynch SRAM
Manufacturer
Alliance Memory
Datasheet

Specifications of AS7C1025B-15JINTR

Rohs
yes
Memory Size
1 Mbit
Organization
128 Kbit x 8
Access Time
15 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Current
90 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOJ-32
Memory Type
CMOS
Factory Pack Quantity
1000
3/26/04, v. 1.3
Functional description
The AS7C1025B is a high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized as 131,072 x 8
bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (t
performance applications. The chip enable input CE permits easy memory and expansion with multiple-bank memory systems.
When CE is high, the device enters standby mode. If inputs are still toggling, the device will consume I
standby power is reached (I
A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0 through I/O7 is written on
the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after
outputs have been disabled with
A read cycle is accomplished by asserting output enable (OE) and chip enable (CE), with write enable (WE) high. The chips drive I/O pins
with the data word referenced by the input address. When either chip enable or output enable is inactive or write enable is active, output
drivers stay in high-impedance mode.
All chip inputs and outputs are TTL-compatible, and operation is from a single 5 V supply. The AS7C1025B is packaged in common
industry standard packages.
Absolute maximum ratings
NOTE: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and func-
tional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
Key: X = don’t care, L = low, H = high.
Truth table
Voltage on V
Voltage on any pin relative to GND
Power dissipation
Storage temperature (plastic)
Ambient temperature with V
DC current into outputs (low)
CE
H
L
L
L
CC
relative to GND
Parameter
WE
SB1
X
H
H
L
). For example, the AS7C1026B is guaranteed not to exceed 55 mW under nominal full standby conditions.
output enable (
CC
applied
AA
, t
RC
OE
Alliance Memory Inc.
OE
X
H
X
, t
L
WC
) or write enable
) of 10/12/15/20 ns with output enable access times (t
Symbol
I
T
T
V
V
OUT
P
bias
stg
(WE).
D
t1
t2
High Z
High Z
®
D
Data
D
OUT
IN
–0.50
–0.50
Min
–65
–55
V
CC
+150
+125
Max
+7.0
1.0
20
+ 0.5
SB
OE
power. If the bus is static, then full
) of 5/6/7/8 ns are ideal for high-
Output disable (I
Standby (I
Write (I
Read (I
Unit
mA
o
o
Mode
W
V
V
C
C
P. 2 of 9
SB
AS7C1025B
CC
CC
, I
)
)
SB1
CC
)
)

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