IS62LV256-70U-TR ISSI, IS62LV256-70U-TR Datasheet
IS62LV256-70U-TR
Specifications of IS62LV256-70U-TR
Related parts for IS62LV256-70U-TR
IS62LV256-70U-TR Summary of contents
Page 1
... IS62LV256AL 32K x 8 LOW VOLTAGE CMOS STATIC RAM FEATURES • High-speed access time: 20 • Automatic power-down when chip is deselected • CMOS low power operation — 17 µW (typical) CMOS standby — (typical) operating • TTL compatible interface levels • Single 3.3V power supply • Fully static operation: no clock or refresh required • Three-state outputs • Industrial and Automotive temperatures available • Lead-free available FUNCTIONAL BLOCK DIAGRAM Copyright © ...
Page 2
... IS65LV256AL IS62LV256AL PIN CONFIGURATION 28-Pin SOJ/ 28-pin SOP A14 1 28 VDD 27 A12 A13 A11 A10 I/O7 I/ I/O6 I/ I/O5 16 I/O2 13 I/O4 GND 14 15 I/O3 PIN DESCRIPTIONS A0-A14 Address Inputs Chip Enable Input CE Output Enable Input OE WE Write Enable Input ...
Page 3
... IS65LV256AL IS62LV256AL OPERATING RANGE Part No. Range IS62LV256AL Commercial IS62LV256AL Industrial IS65LV256AL Automotive DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Output HIGH Voltage oh V Output LOW Voltage ol V Input HIGH Voltage Ih V Input LOW Voltage ( Input Leakage lI I Output Leakage lo Notes –3.0V for pulse width less than 10 ns Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. Integrated Silicon Solution, Inc. — www.issi.com — ...
Page 4
... IS65LV256AL IS62LV256AL POWER SUPPLY CHARACTERISTICS Symbol Parameter I V Operating Supply Current I V Dynamic Operating Supply Current I TTL Standby Current 1 sb (TTL Inputs) I CMOS Standby 2 sb Current (CMOS Inputs) Note address and data inputs are cycling at the maximum frequency means no input lines change. max 2. Typical values are measured 3.3V CAPACITANCE (1,2) Symbol Parameter c Input Capacitance In c Output Capacitance out Notes: 1 ...
Page 5
... IS65LV256AL IS62LV256AL READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time rc t Address Access Time aa t Output Hold Time oha t CE Access Time ace t OE Access Time doe Low-Z Output (2) lzoe t ( High-Z Output hzoe t ( Low-Z Output lzce t ( High-Z Output hzce Power- Power-Down Pd Notes: 1. Test conditions assume signal transition times less, timing reference levels of 1.5V, input pulse levels 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ± ...
Page 6
... IS65LV256AL IS62LV256AL AC WAVEFORMS READ CYCLE NO. 1 (1,2) ADDRESS D OUT READ CYCLE NO. 2 (1,3) ADDRESS OUT SUPPLY CURRENT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE Address is valid prior to or coincident with CE LOW transitions OHA DOE t LZOE t ACE t LZCE HIGH 50% ...
Page 7
... IS65LV256AL IS62LV256AL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End sce t Address Setup Time to Write End aw t Address Hold from Write End ha t Address Setup Time sa t (4) WE Pulse Width Pwe t Data Setup to Write End sd t Data Hold from Write End LOW to High-Z Output (2) hzwe t (2) WE HIGH to Low-Z Output lzwe Notes: 1. Test conditions assume signal transition times less, timing reference levels of 1.5V, input pulse levels 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ± ...
Page 8
... IS65LV256AL IS62LV256AL WRITE CYCLE NO. 2 (CE Controlled) ADDRESS OUT DATA UNDEFINED D IN Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state (1, SCE PWE t HZWE HIGH DATA-IN VALID ≥ ...
Page 9
... IS65LV256AL IS62LV256AL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter V V for Data Retention Data Retention Current dr t Data Retention Setup Time See Data Retention Waveform sdr t Recovery Time rdr Note: 1. Typical Values are measured 3.3V DATA RETENTION WAVEFORM (CE Controlled) t VDD GND Integrated Silicon Solution, Inc. — www.issi.com — Rev. C 05/09/12 Test Condition See Data Retention Waveform V = 2.0V, CE ≥ V – ...
Page 10
... Order Part No. 20 IS62LV256AL-20T IS62LV256AL-20TL IS62LV256AL-20JL 45 IS62LV256AL-45T IS62LV256AL-45TL Industrial Range: –40°C to +85°C Speed (ns) Order Part No. 20 IS62LV256AL-20TI IS62LV256AL-20TLI IS62LV256AL-20JLI 45 IS62LV256AL-45TI IS62LV256AL-45TLI IS62LV256AL-45ULI Automotive Range: –40°C to +125°C Speed (ns) Order Part No. 45 IS65LV256AL-45TA3 IS65LV256AL-45TLA3 TSOP, Lead-free IS65LV256AL-45ULA3 330-mil Plastic SOP, Lead-free 10 Package TSOP ...
Page 11
... IS65LV256AL IS62LV256AL Integrated Silicon Solution, Inc. — www.issi.com — Rev. C 05/09/12 1-800-379-4774 11 ...
Page 12
... IS65LV256AL IS62LV256AL 12 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 05/09/12 ...
Page 13
... IS65LV256AL IS62LV256AL Integrated Silicon Solution, Inc. — www.issi.com — Rev. C 05/09/12 1-800-379-4774 13 ...