C8051F572-IMR Silicon Labs, C8051F572-IMR Datasheet - Page 290

• Manufacturer Part Number: C8051F572-IMR
• Description: 8-bit Microcontrollers - MCU 50 MIPS 16 kB 2 kB CAN2.0 LIN 2.1 SPI
• Manufacturer: Silicon Labs

Specifications of C8051F572-IMR

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Processor Series: C8051

C8051F55x/56x/57x
26.5. Register Descriptions for PCA0
Following are detailed descriptions of the special function registers related to the operation of the PCA.
SFR Definition 26.1. PCA0CN: PCA Control
SFR Address = 0xD8; Bit-Addressable; SFR Page = 0x00
290
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
Name
CCF5
CCF4
CCF3
CCF2
CCF1
CCF0
CF
CR
R/W
CF
7
0
PCA Counter/Timer Overflow Flag.
Set by hardware when the PCA Counter/Timer overflows from 0xFFFF to 0x0000.
When the Counter/Timer Overflow (CF) interrupt is enabled, setting this bit causes the
CPU to vector to the PCA interrupt service routine. This bit is not automatically cleared
by hardware and must be cleared by software.
PCA Counter/Timer Run Control.
This bit enables/disables the PCA Counter/Timer.
0: PCA Counter/Timer disabled.
1: PCA Counter/Timer enabled.
PCA Module 5 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF5 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 4 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF4 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 3 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF3 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 2 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF2 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 1 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF1 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 0 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF0 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
R/W
CR
6
0
CCF5
R/W
5
0
CCF4
R/W
Rev. 1.1
4
0
Function
CCF3
R/W
3
0
CCF2
R/W
2
0
CCF1
R/W
1
0
CCF0
R/W
0
0