MAX6708YKA+T Maxim Integrated, MAX6708YKA+T Datasheet - Page 20

• Manufacturer Part Number: MAX6708YKA+T
• Description: Supervisory Circuits uP Supervisor
• Manufacturer: Maxim Integrated
• Series: MAX6701, MAX6701A, MAX6702, MAX6702A, MAX6703, MAX6703A, MAX6704, MAX6705, MAX6705A, MAX6706, MAX6706A, MAX6707, MAX6707A, MAX6708r

Specifications of MAX6708YKA+T

• Rohs: yes
• Number Of Voltages Monitored: 1
• Monitored Voltage: 2.5 V, 3 V, 3.3 V, 5 V
• Undervoltage Threshold: 2.12 V
• Overvoltage Threshold: 2.25 V
• Output Type: Active High, Active Low, Push-Pull
• Manual Reset: Resettable
• Watchdog: No Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 300 ms
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-23
• Chip Enable Signals: No
• Maximum Power Dissipation: 714 mW
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: Yes
• Supply Current (typ): 6 uA
• Supply Voltage - Min: 1.2 V

Low-Power, 8-Channel,
Serial 12-Bit ADCs
Figure 18. Power-Supply Grounding Connection
Figure 19. MAX186 QSPI Connection
20
______________________________________________________________________________________
* OPTIONAL
V
+5V
ANALOG
DD
INPUTS
R* = 10
MAX186/MAX188
AGND
10
1
2
3
4
5
6
7
8
9
SUPPLIES
V
-5V
SHDN
SS
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
V
SS
DGND
MAX186
REFADJ
SSTRB
DGND
DOUT
AGND
SCLK
VREF
V
+5V
DIN
CIRCUITRY
CS
DD
DIGITAL
20
19
18
17
16
15
14
13
12
11
DGND
GND
0.1µF
0.1µF
+
4.7µF
4.7µF
The MAX186/MAX188 can interface with QSPI at high
throughput rates using the circuit in Figure 19. This
QSPI circuit can be programmed to do a conversion on
each of the eight channels. The result is stored in mem-
ory without taxing the CPU since QSPI incorporates its
own micro-sequencer. Figure 19 depicts the MAX186,
but the same circuit could be used with the MAX188 by
adding an external reference to VREF and connecting
REFADJ to V
Figure 20 details the code that sets up QSPI for
autonomous operation. In external clock mode, the
MAX186/MAX188 perform a single-ended, unipolar con-
version on each of their eight analog input channels.
Figure 21, QSPI Assembly-Code Timing, shows the tim-
ing associated with the assembly code of Figure 20. The
first byte clocked into the MAX186/MAX188 is the control
byte, which triggers the first conversion on CH0. The last
two bytes clocked into the MAX186/MAX188 are all zero
and clock out the results of the CH7 conversion.
High-Speed Digital Interfacing with QSPI
0.01µF
+5V
* CLOCK CONNECTIONS NOT SHOWN
DD
.
SCK
PCS0
MOSI
MISO
V
DDI
, V
V
DDE
SSI
MC68HC16
, V
DDSYN
VSSE
, V
STBY