C8051F347-GMR Silicon Labs, C8051F347-GMR Datasheet - Page 251
C8051F347-GMR
Manufacturer Part Number
C8051F347-GMR
Description
8-bit Microcontrollers - MCU 25 MIPS 32KB 10 ADC
Manufacturer
Silicon Labs
Datasheet
1.C8051F349-GMR.pdf
(276 pages)
Specifications of C8051F347-GMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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21.3.3. USB Start-of-Frame Capture
When T3CE = ‘1’, Timer 3 will operate in one of two special capture modes. The capture event can be
selected between a USB Start-of-Frame (SOF) capture, and a Low-Frequency Oscillator (LFO) Rising
Edge capture, using the T3CSS bit. The USB SOF capture mode can be used to calibrate the system clock
or external oscillator against the known USB host SOF clock. The LFO rising-edge capture mode can be
used to calibrate the internal Low-Frequency Oscillator against the internal High-Frequency Oscillator or
an external clock source. When T3SPLIT = ‘0’, Timer 3 counts up and overflows from 0xFFFF to 0x0000.
Each time a capture event is received, the contents of the Timer 3 registers (TMR3H:TMR3L) are latched
into the Timer 3 Reload registers (TMR3RLH:TMR3RLL). A Timer 3 interrupt is generated if enabled.
External Clock / 8
SYSCLK / 12
SYSCLK
H
T
F
3
Figure 21.10. Timer 3 Capture Mode (T3SPLIT = ‘0’)
T
F
3
L
USB Start-of-Frame (SOF)
Low-Frequency Oscillator
TMR3CN
E
N
T
F
3
L
T
3
C
E
S
P
T
3
L
T
I
Falling Edge
T
R
3
T
C
S
S
3
C
T
3
X
L
K
0
1
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
M
T
3
H
M
T
3
L
0
1
CKCON
M
T
2
H
T
M
2
L
M
T
1
M
T
0
C
S
A
1
T3CSS
TR3
S
C
A
0
0
1
Rev. 1.3
Enable
Capture
TCLK
TMR3RLL TMR3RLH
TMR3L
Interrupt
TMR3H
To ADC
251
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