C8051F703-GQR Silicon Labs, C8051F703-GQR Datasheet - Page 237
![no-image](/images/no-image-200.jpg)
C8051F703-GQR
Manufacturer Part Number
C8051F703-GQR
Description
8-bit Microcontrollers - MCU 16kB Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F703-GQR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F703-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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Table 30.5. SMBus Status Decoding: Hardware ACK Disabled (EHACK = 0) (Continued)
0100
0101 0 X X
0010
0001
0000 1
Values Read
0
0
0
1
1
0
1
0
0
1 X
0 X
1 X
0 X
1 X
0 X
0
1
A slave byte was transmitted;
NACK received.
A slave byte was transmitted;
ACK received.
A Slave byte was transmitted;
error detected.
An illegal STOP or bus error
was detected while a Slave
Transmission was in progress.
A slave address + R/W was
received; ACK requested.
Lost arbitration as master;
slave address + R/W received;
ACK requested.
A STOP was detected while
addressed as a Slave Trans-
mitter or Slave Receiver.
Lost arbitration while attempt-
ing a STOP.
A slave byte was received;
ACK requested.
Current SMbus State
Rev. 1.0
No action required (expecting
STOP condition).
Load SMB0DAT with next data
byte to transmit.
No action required (expecting
Master to end transfer).
Clear STO.
If Write, Acknowledge received
address
If Read, Load SMB0DAT with
data byte; ACK received address
NACK received address.
If Write, Acknowledge received
address
If Read, Load SMB0DAT with
data byte; ACK received address
NACK received address.
Reschedule failed transfer;
NACK received address.
Clear STO.
No action required (transfer
complete/aborted).
Acknowledge received byte;
Read SMB0DAT.
NACK received byte.
Typical Response Options
C8051F70x/71x
Values to
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
Write
0 X 0001
0 X 0100
0 X 0001
0 X
0 1
0 1
0 0
0 1
0 1
0 0
0 0
0 X
0 0
0 1
0 0
0000
0100
0000
0100
0000
1110
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237
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