M24C08-WBN6P STMicroelectronics, M24C08-WBN6P Datasheet - Page 17
![IC EEPROM 8KBIT 400KHZ 8DIP](/photos/1/39/13944/497-8-dip_sml.jpg)
M24C08-WBN6P
Manufacturer Part Number
M24C08-WBN6P
Description
IC EEPROM 8KBIT 400KHZ 8DIP
Manufacturer
STMicroelectronics
Datasheet
1.M24C01-WMN6TP.pdf
(39 pages)
Specifications of M24C08-WBN6P
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
8K (1K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8564
M24C08-WBN6P
M24C08-WBN6P
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M24C08-WBN6P
Manufacturer:
ST
Quantity:
8 186
Part Number:
M24C08-WBN6P
Manufacturer:
ST
Quantity:
20 000
M24C16, M24C08, M24C04, M24C02, M24C01
3.7.2
3.7.3
3.7.4
Current Address Read
For the Current Address Read operation, following a Start condition, the bus master only
sends a device select code with the Read/Write bit (RW) set to 1. The device acknowledges
this, and outputs the byte addressed by the internal address counter. The counter is then
incremented. The bus master terminates the transfer with a Stop condition, as shown in
Figure
Sequential Read
This operation can be used after a Current Address Read or a Random Address Read. The
bus master does acknowledge the data byte output, and sends additional clock pulses so
that the device continues to output the next byte in sequence. To terminate the stream of
bytes, the bus master must not acknowledge the last byte, and must generate a Stop
condition, as shown in
The output data comes from consecutive addresses, with the internal address counter
automatically incremented after each byte output. After the last memory address, the
address counter ‘rolls-over’, and the device continues to output data from memory address
00h.
Acknowledge in Read mode
For all Read commands, the device waits, after each byte read, for an acknowledgment
during the 9
time, the device terminates the data transfer and switches to its Standby mode.
10, without acknowledging the byte.
th
bit time. If the bus master does not drive Serial Data (SDA) Low during this
Figure
10.
Doc ID 5067 Rev 16
Device operation
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