LHF00L28 Sharp Microelectronics, LHF00L28 Datasheet - Page 12

• Manufacturer Part Number: LHF00L28
• Description: IC FLASH 16MBIT 70NS 48TSOP
• Manufacturer: Sharp Microelectronics

Specifications of LHF00L28

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 16M (1M x 16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 425-1885

NOTES:
1. Bus operations are defined in Table 3.
2. All addresses which are written at the first bus cycle should be the same as the addresses which are written at the second
3. ID=Data read from identifier codes. (See Table 2).
4. Following the Read Identifier Codes/OTP command, read operations access manufacturer code, device code, block lock
5. Block erase, full chip erase or program cannot be executed when the selected block is locked. Unlocked block can be
6. Either 40H or 10H are recognized by the CUI (Command User Interface) as the program setup.
7. If the program operation and the erase operation are both suspended, the suspended program operation will be resumed
8. Full chip erase and OTP program operations can not be suspended. The OTP Program command can not be accepted
Read Array
Read Identifier Codes/OTP
Read Query
Read Status Register
Clear Status Register
Block Erase
Full Chip Erase
Program
Block Erase and
Block Erase and
Set Block Lock Bit
Clear Block Lock Bit
Set Block Lock-down Bit
OTP Program
Program Suspend
Program Resume
bus cycle.
X=Any valid address within the device.
IA=Identifier codes address (See Table 2).
QA=Query codes address. Refer to Appendix of LHF00LXX series for details.
BA=Address within the block being erased, set/cleared block lock bit or set block lock-down bit.
WA=Address of memory location for the Program command.
OA=Address of OTP block to be read or programmed (See Figure 3).
QD=Data read from query database. Refer to Appendix of LHF00LXX series for details.
SRD=Data read from status register. See Table 8 for a description of the status register bits.
WD=Data to be programmed at location WA. Data is latched on the rising edge of WE# or CE# (whichever
OD=Data within OTP block. Data is latched on the rising edge of WE# or CE# (whichever goes high first)
configuration code and the data within OTP block (See Table 2).
The Read Query command is available for reading CFI (Common Flash Interface) information.
erased or programmed when RST# is V
first.
while the block erase operation is being suspended.
goes high first) during command write cycles.
during command write cycles.
Command
Cycles
Req’d
Bus
≥ 2
≥ 2
1
2
1
2
2
2
1
1
2
2
2
2
IH
Table 4. Command Definitions
.
Notes
5, 8
7, 8
7, 8
5,6
4
4
5
9
8
LHF00L28
Oper
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
(1)
First Bus Cycle
Addr
WA
BA
BA
BA
BA
OA
X
X
X
X
X
X
X
X
(2)
(10)
40H or
D0H
C0H
Data
FFH
B0H
90H
98H
70H
50H
20H
30H
10H
60H
60H
60H
Oper
Write
Write
Write
Write
Write
Write
Write
Read
Read
Read
(1)
Second Bus Cycle
IA or OA
Addr
WA
QA
BA
BA
BA
BA
OA
X
X
(2)
Rev. 2.45
ID or OD
Data
SRD
D0H
D0H
D0H
01H
2FH
WD
QD
OD
9
(3)