C8051F587-IQR Silicon Labs, C8051F587-IQR Datasheet - Page 334

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C8051F587-IQR

Manufacturer Part Number
C8051F587-IQR
Description
8-bit Microcontrollers - MCU 50 MIPS 96 kB 8 kB SPI 2xUART
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F587-IQR

Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051

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Part Number:
C8051F587-IQR
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C8051F58x/F59x
29.3. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered
Capture, Software Timer, High Speed Output, Frequency Output, 8 to 11-Bit Pulse Width Modulator, or 16-
Bit Pulse Width Modulator. Each module has Special Function Registers (SFRs) associated with it in the
CIP-51 system controller. These registers are used to exchange data with a module and configure the
module's mode of operation. Table 29.2 summarizes the bit settings in the PCA1CPMn and PCA1PWM
registers used to select the PCA1 capture/compare module’s operating mode. All modules set to use 8, 9,
10, or 11-bit PWM mode must use the same cycle length (8-11 bits). Setting the ECCF1n bit in a
PCA1CPMn register enables the module's CCFn interrupt.
334
Bit Number
Capture triggered by positive edge on CEXn
Capture triggered by negative edge on CEXn
Capture triggered by any transition on CEXn
Software Timer
High Speed Output
Frequency Output
8-Bit Pulse Width Modulator (Note 7)
9-Bit Pulse Width Modulator (Note 7)
10-Bit Pulse Width Modulator (Note 7)
11-Bit Pulse Width Modulator (Note 7)
16-Bit Pulse Width Modulator
Notes:
1. X = Don’t Care (no functional difference for individual module if 1 or 0).
2. A = Enable interrupts for this module (PCA1 interrupt triggered on CCFn set to 1).
3. B = Enable 8th, 9th, 10th or 11th bit overflow interrupt (Depends on setting of CLSEL1[1:0]).
4. C = When set to 0, the digital comparator is off. For high speed and frequency output modes, the
5. D = Selects whether the Capture/Compare register (0) or the Auto-Reload register (1) for the associated
6. E = When set, a match event will cause the CCFn flag for the associated channel to be set.
7. All modules set to 8, 9, 10 or 11-bit PWM mode use the same cycle length setting.
associated pin will not toggle. In any of the PWM modes, this generates a 0% duty cycle (output = 0).
channel is accessed via addresses PCA1CPHn and PCA1CPLn.
Operational Mode
Table 29.2. PCA1CPM and PCA1PWM Bit Settings for
PCA1 Capture/Compare Modules
Rev. 1.2
7 6 5 4 3 2 1 0 7 6 5
X X 1 0 0 0 0 A 0 X B
X X 0 1 0 0 0 A 0 X B
X X 1 1 0 0 0 A 0 X B
X C 0 0 1 0 0 A 0 X B
X C 0 0 1 1 0 A 0 X B
X C 0 0 0 1 1 A 0 X B
0 C 0 0 E 0 1 A 0 X B
0 C 0 0 E 0 1 A D X B
0 C 0 0 E 0 1 A D X B
0 C 0 0 E 0 1 A D X B
1 C 0 0 E 0 1 A 0 X B
PCA1CPMn
PCA1PWM
XXX
XXX
XXX
XXX
XXX
XXX
XXX
XXX
XXX
XXX
XXX
4–2
1–0
XX
XX
XX
XX
XX
XX
XX
00
01
10
11

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