M48Z58Y-70PC1 STMicroelectronics, M48Z58Y-70PC1 Datasheet - Page 9

• Manufacturer Part Number: M48Z58Y-70PC1
• Description: IC NVSRAM 64KBIT 70NS 28DIP
• Manufacturer: STMicroelectronics

Specifications of M48Z58Y-70PC1

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 64K (8K x 8)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-DIP Module (600 mil), 28-EDIP
• Data Bus Width: 8 bit
• Organization: 8 Kb x 8
• Interface Type: Parallel
• Access Time: 70 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Operating Current: 50 mA
• Maximum Operating Temperature: 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3685-5

M48Z58, M48Z58Y
Figure 5.
Note:
Table 3.
1. Valid for ambient operating temperature: T
2. C
2.2
Symbol
t
t
t
t
GHQZ
GLQX
EHQZ
ELQX
t
t
t
t
t
GLQV
AXQX
AVQV
ELQV
AVAV
L
= 5 pF (see
(2)
(2)
(2)
(2)
A0-A12
E
G
DQ0-DQ7
READ mode AC waveforms
WRITE enable (W) = High.
READ mode AC characteristics
READ cycle time
Address valid to output valid
Chip enable low to output valid
Output enable low to output valid
Chip enable low to output transition
Output enable low to output transition
Chip enable high to output Hi-Z
Output enable high to output Hi-Z
Address transition to output transition
WRITE mode
The M48Z58/Y is in the WRITE mode whenever W and E are low. The start of a WRITE is
referenced from the latter occurring falling edge of W or E. A WRITE is terminated by the
earlier rising edge of W or E. The addresses must be held valid throughout the cycle. E or W
must return high for a minimum of t
to the initiation of another READ or WRITE cycle. Data-in must be valid t
end of WRITE and remain valid for t
cycles to avoid bus contention; although, if the output bus has been activated by a low on E
and G, a low on W will disable the outputs t
Figure 9 on page
14).
Parameter
tAVQV
tELQX
A
tGLQX
tELQV
= 0 to 70 °C; V
tGLQV
(1)
Doc ID 2559 Rev 10
EHAX
WHDX
VALID
tAVAV
CC
from chip enable or t
= 4.75 to 5.5 V or 4.5 to 5.5 V (except where noted).
afterward. G should be kept high during WRITE
WLQZ
after W falls.
VALID
Min
70
10
5
5
WHAX
tGHQZ
M48Z58/Y
from WRITE enable prior
Max
70
70
35
25
25
DVWH
Operating modes
tAXQX
tEHQZ
prior to the
AI01385
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
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