CY7C1470V25-167AXC Cypress Semiconductor Corp, CY7C1470V25-167AXC Datasheet - Page 16
![IC SRAM 72MBIT 167MHZ 100LQFP](/photos/6/76/67624/428-100-tqfp_14x20x1_4_sml.jpg)
CY7C1470V25-167AXC
Manufacturer Part Number
CY7C1470V25-167AXC
Description
IC SRAM 72MBIT 167MHZ 100LQFP
Manufacturer
Cypress Semiconductor Corp
Specifications of CY7C1470V25-167AXC
Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
72M (2M x 36)
Speed
167MHz
Interface
Parallel
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Density
72Mb
Access Time (max)
3.4ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
167MHz
Operating Supply Voltage (typ)
2.5V
Address Bus
21b
Package Type
TQFP
Operating Temp Range
0C to 70C
Number Of Ports
4
Supply Current
400mA
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Word Size
36b
Number Of Words
2M
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1470V25-167AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
135
Company:
Part Number:
CY7C1470V25-167AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C1470V25-167AXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Company:
Part Number:
CY7C1470V25-167AXCT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Scan Register Sizes
Identification Codes
Document Number: 38-05290 Rev. *L
Instruction
Bypass
ID
Boundary scan order–165-ball FBGA
Boundary scan order–209-ball BGA
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Instruction
Register Name
Code
000
001
010
100
101
011
110
111
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces
all SRAM outputs to high Z state. This instruction is not 1149.1-compliant.
Loads the ID register with the vendor ID code and places the register between TDI and TDO.
This operation does not affect SRAM operations.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces
all SRAM output drivers to a high Z state.
Do Not Use: This instruction is reserved for future use.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Does not
affect SRAM operation. This instruction does not implement 1149.1 preload function and is
therefore not 1149.1-compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
Bit Size (× 36)
32
71
3
1
–
Description
Bit Size (× 18)
32
52
3
1
–
Bit Size (× 72)
CY7C1470V25
CY7C1472V25
CY7C1474V25
110
32
3
1
–
Page 16 of 31
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