CY7C1512AV18-200BZXI Cypress Semiconductor Corp, CY7C1512AV18-200BZXI Datasheet - Page 28

• Manufacturer Part Number: CY7C1512AV18-200BZXI
• Description: IC SRAM 72MBIT 200MHZ 165TFBGA
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1512AV18-200BZXI

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous, QDR II
• Memory Size: 72M (4M x 18)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 165-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document History Page
© Cypress Semiconductor Corporation, 2006-2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used
for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use
as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support
systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Document #: 001-06984 Rev. *C
QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress, IDT, NEC, Renesas, and Samsung. All product and company names mentioned in this document
are the trademarks of their respective holders.
Document Title: CY7C1510AV18/CY7C1525AV18/CY7C1512AV18/CY7C1514AV18, 72-Mbit QDR™-II SRAM 2-Word Burst
Architecture
Document Number: 001-06984
REV.
*A
*B
*C
**
ECN NO.
1523363 See ECN VKN/AESA Converted from preliminary to final
433241
462002
503690
See ECN
See ECN
See ECN
ISSUE
DATE
ORIG. OF
CHANGE
NXR
NXR
VKN
DESCRIPTION OF CHANGE
New Data Sheet
Changed t
t
10 ns in TAP AC Switching Characteristics table
Modified Power Up waveform
Minor change: Moved data sheet to web
Updated Logic Block diagram
Updated I
Changed DLL minimum operating frequency from 80MHz to 120MHz
Changed t
Modified footnotes 20 and 27
TMSS
, t
TDIS
DD
TCYC
CYC
, t
/I
CS
SB
max spec to 8.4ns for all speed bins
Revised September 27, 2007
from 100 ns to 50 ns, changed t
, t
specs
TMSH
, t
TDIH
, t
CH
CY7C1510AV18, CY7C1525AV18
CY7C1512AV18, CY7C1514AV18
from 10 ns to 5 ns and changed t
TH
and t
TL
from 40 ns to 20 ns, changed
TDOV
from 20 ns to
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