ST72T331N2T6 STMicroelectronics, ST72T331N2T6 Datasheet - Page 28

• Manufacturer Part Number: ST72T331N2T6
• Description: 8-bit Microcontrollers - MCU OTP EPROM 8K SPI/SCI
• Manufacturer: STMicroelectronics

Specifications of ST72T331N2T6

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: ST7
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 16 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 384 B
• On-chip Adc: Yes
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 8 bit
• A/d Channels Available: 8
• Interface Type: SCI, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 44
• Number Of Timers: 2
• On-chip Dac: No
• Program Memory Type: EPROM
• Factory Pack Quantity: 90
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.5 V

ST72E331 ST72T331
I/O PORTS (Cont’d)
5.1.2.4 Analog Alternate Function
When the pin is used as an ADC input the I/O must
be configured as input, floating. The analog multi-
plexer (controlled by the ADC registers) switches
the analog voltage present on the selected pin to
the common analog rail which is connected to the
ADC input.
It is recommended not to change the voltage level
or loading on any port pin while conversion is in
progress. Furthermore it is recommended not to
have clocking pins located close to a selected an-
alog pin.
Warning : The analog input voltage level must be
within the limits stated in the Absolute Maximum
Ratings.
Figure 20. Recommended I/O State Transition Diagram
28/107
28
with interrupt
INPUT
no interrupt
INPUT
5.1.3 I/O Port Implementation
The hardware implementation on each I/O port de-
pends on the settings in the DDR and OR registers
and specific feature of the I/O port such as ADC In-
put (see
these I/O ports from one state to another should
be done in a sequence that prevents unwanted
side effects. Recommended safe transitions are il-
lustrated in
tially risky and should be avoided, since they are
likely to present unwanted side-effects such as
spurious interrupt generation.
open-drain
OUTPUT
Figure
Figure
21) or true open drain. Switching
20. Other transitions are poten-
OUTPUT
push-pull