Si53159-EVB Silicon Labs, Si53159-EVB Datasheet

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Si53159-EVB

Manufacturer Part Number
Si53159-EVB
Description
Clock & Timer Development Tools 9 PCIe BUFFER
Manufacturer
Silicon Labs
Type
Clock Buffersr
Datasheet

Specifications of Si53159-EVB

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
Si53159
Frequency
100 MHz to 210 MHz
Operating Supply Voltage
3.3 V
Interface Type
I2C, PCIe
Si53159 E
Description
The Si53159 is a nine port PCIe clock buffer compliant
to the PCIe Gen1, Gen2 and Gen3 standards. The
Si53159 is a 48-pin QFN device that operates on a
3.3 V power supply and can be controlled using SMBus
signals along with hardware control input pins. The
device is spread aware and accepts frequency spread
differential clock frequency range from 100 to 210 MHz.
The connections are described in this document.
Rev. 0.1 1/12
CKPWRGD/Power down enable
VALUATION
DIFF0 connection
DIFF4/DIFF5 Output Enable
DIFF6/DIFF8 Output Enable
for application
DIFF2 Output Enable
DIFF3 Output Enable
DIFF0 Output Enable
DIFF1 Output Enable
power supply
VDD = 3.3 V
Power connectors
GND
Copyright © 2012 by Silicon Labs
B
DIFF1 connection for
OARD
application
Clock Input
Differential
EVB Features
This document is intended to be used in conjunction
with the Si53159 device and data sheet for the following
tests:
PCIe Gen1, Gen2, Gen3 compliancy
Power consumption test
Jitter performance
Testing out I
In-system validation where SMA connectors are
present
U
DIFF8 connection
SDATA
SER
DIFF2 connection
for application
for application
Si 53159- E VB
GND
Si53159
2
SCLK
S
C code for signal tuning
G
DIFF7 connection
DIFF3 connection
for application
UIDE
for application
Si53159-EVB
connection
application
connection
application
connection
application
DIFF6
DIFF5
DIFF4
for
for
for

Related parts for Si53159-EVB

Si53159-EVB Summary of contents

Page 1

... DIFF1 connection for for application application Copyright © 2012 by Silicon Labs ’ UIDE 2 C code for signal tuning DIFF7 connection for application DIFF6 connection SCLK for application DIFF5 connection for application DIFF4 connection for application DIFF3 connection for application Si53159-EVB ...

Page 2

... Si53159-EVB 1. Front Panel Differential Buffer Input for on Si53159-EVB only Power Connectors OE0 and OE1 hardware input control for DIFF0 and DIFF1 respectively t t GND Connector 3.3V Power Supply Connector OE2, OE3, OE4/5 and OE6/8 hardware inputs control for DIFF2, DIFF3, DIFF4 though DIFF5 and ...

Page 3

... C to control bit in Control register. The hardware pin and the 2 C control bits and hardware pins are listed in Table 2. Output Enable Control Output DIFF0 DIFF1 DIFF2 DIFF3 DIFF4 DIFF5 DIFF6 DIFF7 DIFF8 Rev. 0.1 Si53159-EVB   Hardware Control Input OE0 OE1 OE2 OE3 OE4/5 OE4/5 OE6/8 OE6/8 OE6/8 3 ...

Page 4

... Si53159-EVB 2. Schematics R1 XOUT_DIFFIN 0 YC1 NI XTL P/N: ECS-250-20-5PXDU-F-TR Use SMD footprint DUTGND YC2 NI R4 XIN_DIFFIN# 0 VDD1 SSON VCC_3.3V JP1 JP2 JP3 JUMPER JUMPER JUMPER C13 + C9 + C10 C17 C14 1uF 1uF 1uF 10uF 10uF 10uF VDD1 VDD2 VDD12 ...

Page 5

... DUTGND DUTGND DIFF5 SMA C52 DIFF5_28 2.0pF DUTGND DIFF5#_27 C53 2.0pF L1 SHOULD BE DIFF5#_1 SHORT AS POSSIBLE SMA DUTGND DUTGND Figure 5. Differential Clock Signals Rev. 0.1 Si53159-EVB SCLK/SDATA VDD_3.3V R15 HEADER 1x3 10K 3 SCLK 2 1 VDD_3.3V P1 DUTGND R17 10K SDATA XIN_DIFFIN#1 XIN_DIFFIN# SMA DUTGND ...

Page 6

... Si53159-EVB C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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