MAX98089EVKIT+WLP Maxim Integrated, MAX98089EVKIT+WLP Datasheet - Page 87

• Manufacturer Part Number: MAX98089EVKIT+WLP
• Description: Audio IC Development Tools
• Manufacturer: Maxim Integrated
• Type: Audio CODECr

Specifications of MAX98089EVKIT+WLP

• Product: Evaluation Kits
• Tool Is For Evaluation Of: MAX98089
• Operating Supply Voltage: 2.8 V to 5.5 V
• Interface Type: I2C
• Operating Supply Current: 1 A

Table 11. Clock Control Registers (continued)
Maxim Integrated
REGISTER
0x4F
0x50
BIT
7
6
5
4
3
2
1
0
3
2
1
0
DAI2_DAC_LP
DAI1_DAC_LP
DAC2DITHEN
DAC1DITHEN
CGM2_EN
CGM1_EN
NAME
DAI� DAC Low Power Select.
These bits setup the clocks to be generated from fixed counters that bypass the PLL for
DAC low power mode.
DAI2 DAC Input Dither Enable
DAC2DITHEN is recommended to be set when DAI2_DAC_LP = 0000.
0 = Disabled
1 = Enabled
DAI1 DAC Input Dither 1 Enable
DAC1DITHEN is recommended to be set when DAI1_DAC_LP = 0000.
0 = Disabled
1 = Enabled
DAI2 Clock Gen Module Enable
CGM1_EN has to be set along with CGM2_EN to enable the clock generation for the
DAI2 DAC playback path.
0 = Disabled
1 = Enabled
DAI1/Device Clock Gen Module Enable
CGM1_EN enables the device clock generation, and needs to be set for DAC playback
or ADC record.
0 = Disabled
1 = Enabled
VALUE
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
Low-Power, Stereo Audio Codec
PCLK = 1152
PCLK = 1536
PLL derived
PCLK = 128
PCLK = 192
PCLK = 256
PCLK = 384
PCLK = 768
SETTING
x LRCLK
x LRCLK
x LRCLK
x LRCLK
x LRCLK
x LRCLK
x LRCLK
clock
with FlexSound Technology
Audio 96kHz
Audio 96kHz
Audio 48kHz
Audio 48kHz
SELECT
FILTER
Voice
Voice
Voice
—
DESCRIPTION
VALUE
0xC
0xD
0x8
0x9
0xA
0xB
0xE
0xF
PCLK = 2304
SETTING
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
x LRCLK
MAX98089
SELECT
FILTER
Voice
—
—
—
—
—
—
—
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