EVAL-AD7685SDZ Analog Devices, EVAL-AD7685SDZ Datasheet - Page 8

• Manufacturer Part Number: EVAL-AD7685SDZ
• Description: Data Conversion IC Development Tools Eval Board16-Bit 250 KSPS Serial MSOP
• Manufacturer: Analog Devices
• Type: ADCr
• Series: AD7685r

Specifications of EVAL-AD7685SDZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: AD7685
• Interface Type: SPI
• Operating Supply Voltage: 2.3 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 1

AD7685
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 7. Pin Function Descriptions
Pin No
1
2
3
4
5
6
7
8
9
10
1
AI = analog input, DI = digital input, DO = digital output, and P = power.
Mnemonic
REF
VDD
IN+
IN−
GND
CNV
SDO
SCK
SDI
VIO
EPAD
Figure 5. 10-Lead MSOP Pin Configuration
GND
VDD
REF
IN+
IN–
1
2
3
4
5
Type
AI
P
AI
AI
P
DI
DO
DI
DI
P
(Not to Scale)
AD7685
TOP VIEW
1
Description
Reference Input Voltage. The REF range is from 0.5 V to VDD. It is referred to the GND pin. This pin should
be decoupled closely to the pin with a 10 μF capacitor.
Power Supply.
Analog Input. It is referred to IN−. The voltage range, that is, the difference between IN+ and IN−, is 0 V to V
Analog Input Ground Sense. Connect to the analog ground plane or to a remote sense ground.
Power Supply Ground.
Convert Input. This input has multiple functions. On its leading edge, it initiates the conversions and
selects the interface mode of the part, chain, or CS mode. In CS mode, it enables the SDO pin when low.
In chain mode, the data should be read when CNV is high.
Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK.
Serial Data Clock Input. When the part is selected, the conversion result is shifted out by this clock.
Serial Data Input. This input provides multiple features. It selects the interface mode of the ADC as follows:
Chain mode is selected if SDI is low during the CNV rising edge. In this mode, SDI is used as a data input
to daisy chain the conversion results of two or more ADCs onto a single SDO line. The digital data level
on SDI is output on SDO with a delay of 16 SCK cycles.
CS mode is selected if SDI is high during the CNV rising edge. In this mode, either SDI or CNV can enable
the serial output signals when low, and if SDI or CNV is low when the conversion is complete, the BUSY
indicator feature is enabled.
Input/Output Interface Digital Power. Nominally at the same supply as the host interface (1.8 V, 2.5 V, 3 V, or 5 V).
Exposed Pad. Exposed pad connected to GND. This connection is not required to meet the electrical
performances.
10
9
8
7
6
VIO
SDI
SCK
SDO
CNV
Rev. C | Page 8 of 28
Figure 6. 10-Lead QFN (LFCSP) Pin Configuration
NOTES
1. EXPOSED PAD CONNECTED TO GND. THIS
CONNECTION IS NOT REQUIRED TO MEET
THE ELECTRICAL PERFORMANCES.
GND
VDD
REF
IN+
IN–
1
2
3
4
5
(Not to Scale)
AD7685
TOP VIEW
10 VIO
9
8
7
6
SDI
SCK
SDO
CNV
REF
.