IS62WV2568BLL-55HLI ISSI, Integrated Silicon Solution Inc, IS62WV2568BLL-55HLI Datasheet - Page 8

• Manufacturer Part Number: IS62WV2568BLL-55HLI
• Description: IC SRAM 2MBIT 55NS 32STSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS62WV2568BLL-55HLI

• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Memory Size: 2M (256K x 8)
• Speed: 55ns
• Interface: Parallel
• Voltage - Supply: 2.5 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-sTSOP
• Density: 2Mb
• Access Time (max): 55ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: STSOP-I
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 15mA
• Operating Supply Voltage (min): 2.5V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Word Size: 8b
• Number Of Words: 256K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS62WV2568ALL, IS62WV2568BLL
8
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4V to 1.4V
2. The internal write time is defined by the overlap of CS1 LOW, CS2 HIGH and WE LOW. All signals must be in valid states to
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
WRITE CYCLE NO. 1 (CS1/CS2 Controlled, OE = HIGH or LOW)
Symbol
t
t
t
t
t
t
t
t
t
t
Wc
scs
AW
hA
sA
PWe
sd
hd
hzWe
LzWe
ADDRESS
and output loading specified in Figure 1.
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the write.
1
/tscs
DOUT
CS1
CS2
2
DIN
WE
Parameter
Write Cycle Time
CS1/CS2 to Write End
Address Setup Time to Write End
Address Hold from Write End
Addrress Setup Time
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
t
DATA UNDEFINED
SA
t
AW
t
HZWE
t
t
Min.
SCS2
SCS1
45
35
35
35
20
—
0
0
0
5
t
WC
t
45ns
PWE
(1,2)
HIGH-Z
Max.
20
—
—
—
—
—
—
—
—
—
(Over Operating Range)
Integrated Silicon Solution, Inc. — www.issi.com
t
SD
DATA-IN VALID
Min.
55
45
45
40
25
—
0
0
0
5
55ns
Max.
t
HA
20
—
—
—
—
—
—
—
—
—
t
t
LZWE
HD
Min.
70
60
60
50
30
—
0
0
0
5
70ns
Max
—
—
—
—
—
—
—
—
20
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. H
1/6/10